An introduction to Time-Sensitive networking (TSN) and how it makes Ethernet a suitable backbone for complex automotive and industrial systems.
Jun 22, 2019
Silicon IP Cores
CSENT-TX
Enhanced SENT/SAE J2716 TX Controller
The CSENT-TX core implements a transmitter for the Single Edge Nibble Transmission (SENT) protocol. It complies with the SAE J2716 standard and supports both synchronous and asynchronous transmission modes.
Under asynchronous mode, the core autonomously, without requiring any extra action from the host system, initiates transmission, as soon as data become available in its input-data register. Under synchronous mode, transmission is triggered by either the host system via the core’s control registers, or when the core receives a valid master trigger pulse via the SENT interface.
Designed for ease of use and integration, the core reports its status using two signals, one indicating that a transmission is in progress, and a second one reporting the completion of a frame's transmission. Furthermore, the CSENT-TX provides access to its control, status, and data registers via a 32-bit APB, or an AXI4 or a generic subordinate interface. Implementation of the core is straightforward, as the core contains no latches or tri-states, is fully synchronous with a single clock domain, and includes no multicycle or false paths.
The CSENT-TX core is designed with industry best practices, has been rigorously verified and is production proven.
The core can be mapped to any ASIC technology and any FPGA device. The following are sample implementation results, which do not represent the highest speed or smallest area possible for the core and exclude the FIFOs.
| Target Technology | Core Configuration | Logic Resources | Freq |
| TSMC 180g |
No FIFO
Asynchronous Transmitter Only
|
1,161 Gates
|
400 MHz
|
| TSMC 40g |
992 Gates
|
400 MHz
|
|
| TSMC 28hpc | 777 Gates | 400 MHZ | |
| TSMC 16 | 867 Gates | 400 MHz | |
| TSMC 180g |
Sensor's Trigger Pulse Protocol Mode
8 x 32-bit FIFO
Synchronous and Asynchronous
Transmitter
|
9,096 Gates |
400 MHz |
| TSMC 40g | 8,507 Gates | 400 MHz | |
| TSMC 28hpc | 6,744 Gates | 400 MHz | |
| TSMC 16 | 7,529 Gates | 400 MHz |
The core can be mapped to any Altera FPGA device. The following are sample implementation results, which do not represent the highest speed or smallest area possible for the core and exclude the FIFOs.
| Target Technology | Core Configuration | Logic Resources | Memory Resources | Freq |
| Agilex 5 A5EA013BB23BE5S |
No FIFO
Asynchronous Transmitter Only
|
79 ALMs
|
- | 625 MHz |
| Cyclone 10GX 10CX220YF672I5G |
64 ALMs | - | 625 MHz | |
| Agilex 5 A5EA013BB23BE5S |
Sensor's Trigger Pulse Protocol Mode
8 x 32-bit FIFO
Synchronous and Asynchronous
Transmitter
|
326 ALMs |
256 bits | 350 MHz |
| Cyclone 10GX 10CX220YF672I5G |
307 ALMs | 256 bits | 400 MHz |
The core can be mapped to any AMD FPGA device. The following are sample implementation results, which do not represent the highest speed or smallest area possible for the core and exclude the FIFOs.
| Target Technology | Core Configuration | Logic Resources | Freq |
| Artix Ultrascale+ xaau15p-1-i |
No FIFO
Asynchronous Transmitter Only
|
66 LUTs
|
1,200 MHz |
| Kintex Ultrascale xcku085-1-c |
63 LUTs | 850 MHz | |
| Artix Ultrascale+ xaau15p-1-i |
Sensor's Trigger Pulse Protocol Mode
8 x 32-bit FIFO
Synchronous and Asynchronous
Transmitter
|
425 LUTs |
600 MHz |
| Kintex Ultrascale xcku085-1-c |
415 LUTs | 450 MHz |
The core can be mapped to any Microchip FPGA device. The following are sample implementation results, which do not represent the highest speed or smallest area possible for the core and exclude the FIFOs.
| Target Technology | Core Configuration | Logic Resources | Memory Resources | Freq |
| Igloo2 M2GL150-STD |
No FIFO
Asynchronous Transmitter Only
|
108 LUTs
|
- | 290 MHz |
| PolarFire MPF300T-STD |
103 LUTs | - | 400 MHz | |
| RTG4 RT4G150-STD |
105 LUTs | - | 220 MHz | |
| Igloo2 M2GL150-STD |
Sensor's Trigger Pulse Protocol Mode
8 x 32-bit FIFO
Synchronous and Asynchronous
Transmitter
|
754 LUTs |
2 RAM64x18 | 110 MHz |
| PolarFire MPF300T-STD |
719 LUTs | 2 uSRAM | 180 MHz | |
| RTG4 RT4G150-STD |
761 Gates | 2 RAM64x18 | 100 MHz |
The CSENT-TX core is suitable for automotive microcontrollers and SoCs.
The core as delivered is warranted against defects for ninety days from purchase. Thirty days of phone and email technical support are included, starting with the first interaction. Additional maintenance and support options are available.