New MIPI I3C Basic core enables fast, low-power, royalty-free, I2C-compatible, interfaces or an I3C-to-AHB Bridge for sensors and microcontroller designs
Silicon IP Cores
GEON™ Secure Boot Hardware Engine
Hardware cores for a variety of standard interface protocols: I2C, SPI, UARTs, and HDLC/SDLC.
Time Sensitive Networking (TSN) Ethernet is appealing for aeronautic systems, and potentially may replace current standards like MIL-STD-1553 and ARINC-664. The standard for Aerospace TSN—the 802.1DP profile —is evolving, and our partner Fraunhofer...
New IP core provides fast, area-efficient, processor-agnostic protection against booting a system from malicious or otherwise insecure code.
HCLTech is a longtime partner and IP cores customer of CAST, a mutually-beneficial relationship that is continuing with this announcement.
IP Cores newsletter: CAST COREspondence April 5, 2024 – Embedded World, Security, Interfaces, Defense, more
Pre-Integrated AMBA bus-fabric & peripherals subsystems
LZ4/Snappy Data Decompressor
This first LZ4/Snappy IP core ASIC or FPGA hardware engine offloads a system’s CPU for high-throughput, low-latency, lossless data decompression.