GEON™ Secure Boot Hardware Engine
Silicon IP Cores
Hardware cores for a variety of standard interface protocols: I2C, SPI, UARTs, and HDLC/SDLC.
New IP core provides fast, area-efficient, processor-agnostic protection against booting a system from malicious or otherwise insecure code.
Pre-Integrated AMBA bus-fabric & peripherals subsystems
A set of controller IP cores for different types of memories, including Serial/SPI Flash, Cache Memory, and SRAM.
I2C and SPI Master/Slave Controller
A full-featured, combined I2C and SPI serial communications interface controller IP core that saves silicon resources and development effort versus using two separate IP cores.
Hardware crypto engines for PQC, SNOW-V, SHA, AES, and other cryptographic standards.
New core combines KiviCore research and development expertise with CAST quality and usability standards for a better PQC IP experience
SNOW-V Stream Cipher Engine