Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Peripheral Platforms
& AMBA Infrastructure

BA2x AHB Platform
BA2x AXI Platform

 

GPUs & Peripherals
See Graphics &
  Peripherals Cores >

These video and image compression cores and subsystems help you handle video compression for demanding, high-quality applications or choose the best type of image compression for your specific system.

JPEG 2000
Encoder
J2K Platform

Lossless Compression
LJPEG Encoder
LJPEG Decoder
JPEG-LS Encoder

Complement or replace system processors with GPUs and easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Graphics Processors
Nema Embedded GPU
ThinkVG vector GPU
2D/2.5D Graphic Accelerator

Display Controllers
Multilayer LCD Display Processor

Device Controllers
smart card reader

Legacy Peripherals
DMA Controllers
8237, 82380
UARTs
16450S, 16550S, 16750S
Timer/Counter
8254

AMBA Infrastructure
AMBA Infrastructure Cores
AHB 32-bit DMA


Interconnect Peripherals

See Interconnect Cores >

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

DisplayPort
Transmitter
• Receiver

Ethernet MAC
• 1G eMAC Controller

Data Link Controllers
• SDLC & HDLC

PCI — Target
32-bit
32-bit multi
64-bit
PCI — Master
32-bit
32-bit multi
64-bit
PCI — Host Bridge
32 bit
32 bit - AHB
32 bit & device - AHB

These encryption cores make it easy to build security into a variety of systems.

DES
DES single
DES triple

  • Capable of running all existing 16450 and 16550a software
  • Fully Synchronous design. All inputs and outputs are based on the rising edge of clock
  • In FIFO mode, transmitter and receiver are each buffered with up to 256 byte FIFO’s to reduce the number of interrupts presented to the CPU
  • Available with FIFO sizes of 8, 16, 32, 64, 128 or 256 bytes
  • Adds or strips standard asynchronous communication bits (start, stop and parity) to or from the serial data
  • Independently controlled transmit, receive, line status and data set interrupts
  • Programmable baud generator divides any input clock by 1 to (2**16 - 1) and generates the 16 x clock
  • Modem control functions (CTSn, RTSn, DSRn, DTRn, and DCDn)
  • Programmable Auto-CTSn and Auto-RTSn
  • In Auto-CTSn mode, CTSn controls the transmitter
  • In Auto-RTSn mode, the receiver FIFO contents and threshold control RTSn
  • Serial Port has an optional Infrared Data Association (IrDA) data port
  • Fully programmable serial interface characteristics:
    • 5, 6, 7, or 8 bit characters
    • Even, odd, or no-parity bit generation and detection
    • 1, 1½, or 2 stop bit generation
    • Baud generation
  • False start-bit detection
  • Complete status register
  • Internal diagnostic capabilities: loop-back controls for communications link fault isolation
  • Full prioritized interrupt system controls

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PDF Datasheets

ASIC
Altera, Xilinx

Related Products

  • H16450S Synchronous 16450 UART
  • H16550S Synchronous 16550 UART with FIFO

Related Information

Validated for Mentor Graphics Presicision FPGA SynthesisValidated for Precision™ FPGA Synthesis

UART IP Core H16750S Synchronous 16750 UART with FIFO & IrDA Core

The H16750S is a standard UART providing 100% software compatibility with the popular Texas Instruments 16750 device. It performs serial-to-parallel conversion on data originating from modems or other serial devices, and performs parallel-to-serial conversion on data from a CPU to these devices.

The H16750S can be run in either 16450-compatible character mode or FIFO mode, where an internal FIFO relieves the CPU of excessive software overhead. An IrDA-compliant serial data port may be used for infrared communication.

Developed for easy reuse in ASIC and FPGA applications, the H16750S is available optimized for several device families with competitive utilization and performance characteristics.

See representative implementation results (each in a new pop-up window):

ASIC numbers Altera numbers Xilinx numbers

Applications

The H16750S can be utilized for a variety of applications including:

Symbol Diagram

H16750S UART with FIFOs and Synchronous CPU Interface Symbol Diagram

Block Diagram

H16750S UART with FIFOs and Synchronous CPU Interface Block Diagram

Support

The core as delivered is warranted against defects for ninety days from purchase. Thirty days of phone and email technical support are included, starting with the first interaction. Additional maintenance and support options are available.

Verification

The core has been verified through extensive simulation and rigorous code coverage measurements.

Deliverables

The core is available in ASIC (synthesizable HDL) and FPGA (netlist) forms, and includes everything required for successful implementation: