In the News
Synplicity news release 4/15/08: Synplicity Launches ReadyIP Program: The Industry's First Universal, Secure IP Flow For FPGA Implementation — Key IP Vendors – ARM, CAST, Gaisler Research, Synopsys and Tensilica – Support Program
Synplicity ReadyIP Program
Evaluation versions of the following core categories are available for downloading through the Synplicity ReadyIP program.
H16450S — UART with Synchronous CPU Interface Core
H16550S — UART with FIFOs and Synchronous CPU Interface Core
H16750S — UART with FIFOs, IrDA Interface, and Synchronous CPU Interface Core
Note: Synplicity-configured Infrastructure Cores will have the component name shown in parenthesis, "soc*", rather than the general name used in the datasheets.