Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Protected Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs. See the video and image compression Family Page for a media compression overview.

 H.264 Video Decoders
Low Latency Constrained
  Baseline Profile

Low-Power Constrained
  Baseline Profile

 H.265 HEVC Decoders
Main Profile

Companion Cores
Image Processing
WDR/HDR
CAMFE Camera Processor
Network Stacks
40G UDPIP Stack
1G/10G UDPIP Stack
• Hardware RTP Stack
  – for H.264
  – for JPEG
IEEE 802.1AS Time Sync.
   Stack

IEEE 802.1Qav & 802.1Qbv
   Stack

• MPEG Transport Stream
  Mux

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

JPEG-LS
Lossless & Near-Lossless
Encoder
Decoder

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • for Intel FPGAs
    • for Xiinx FPGAs

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

Flash Controllers
Parallel Flash
Parallel Flash for AHB
Universal Serial NOR/NAND
   Flash for AHB

Legacy Peripherals
DMA Controllers
8237, 82380
UARTs
16450S, 16550S, 16750S
Timer/Counter
8254

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

SPI
Octal/Quad/Dual/Single SPI
XIP & DMA for AHB
XIP for AHB
Quad SPI
XIP & DMA for AHB
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
Master/Slave VIP
I2C
Master  • Slave

These encryption cores make it easy to build security into a variety of systems.

AES
AES, programmable
  CCM, GCM, XTS
Key Expander

DES
DES single
DES triple

Hash Functions
SHA-3 (Keccak)
SHA-256
SHA-1
MD5

by CAST, Inc.

Related Links

Recent news summary page

Visit related pages:

News TSN IP Core making devices fit for real-time Ethernet

Nuremberg, Germany, November 27 2018


Press release from Fraunhofer IPMS, source of the TSN Ethernet IP Subsystem we offer 


Time-Sensitive Networking (TSN) is a set of standards allowing for the timed and prioritized transmission of real-time critical messages over standard Ethernet hardware. With the TSN IP Core, developers at Fraunhofer IPMS provide equipment manufacturers and operators the opportunity to make their devices fit for new TSN standards. Fraunhofer IPMS will be presenting the possibilities of the TSN IP Core to members of the specialist public in Hall 7a, Booth 246 at this year's SPS IPC Drives event from 27-29 November in Nuremberg.

 

TSN Ethernet IP illustration by Fraunhofer IPMSAlready a reality in many companies, intelligent Industry 4.0 automation systems connect increasingly more sensors, machines, and control units with each other. These systems must not only handle ever larger amounts of data, but especially in case of control systems and sensors/actuators, must transmit data with precise timing – often in real time. Many manufacturers of industrial devices, therefore, are currently in the process of making their devices TSN-capable. Because Ethernet network technology typically found throughout industrial automation is not designed for difficult real-time transmission due to latencies and non-deterministic delays in overload situations, Fraunhofer IPMS provides companies support with a so-called IP Core.

Dr. Frank Deicke, Head of the Fraunhofer IPMS Research Group, states, "Our TSN IP Core helps producers and operators of manufacturing and process automation equipment who aim to extend their network devices to meet Time-Sensitive Networking (TSN) standards." He explains, "Ethernet TSN is advantageous in that it allows data packets with real-time requirements to be prioritized ahead of less time-critical messages, and time-controlled and deterministically transmitted over standard Ethernet hardware throughout widely ramified networks. Vendor-specific real-time field buses that require specialized hardware support, that are not compliant with IEEE 802.1 and 802.3 standards, and that often interfere with each other are therefore unnecessary."

The Fraunhofer IPMS TSN IP CORE includes hardware modules for time synchronization (IEEE 802.1AS) and data stream management (Traffic Shaping) according to IEEE 802.1 Qav and 802.1Qbv standards as well as a dedicated Ethernet MAC for low latency. Available as a synthesizable source code or a netlist, the IP Core uses standard AMBA® or Avalon® interfaces to facilitate integration with your own circuits and FPGA solutions.

At the international SPS IPC Drives trade fair for intelligent automation being held from 27-29 November 2018 in Nuremberg, Fraunhofer IPMS developers will present the TSN IP Core together with industrial-grade solutions as well as customer evaluation kits for wireless optical data transmission (Li-Fi) for smaller and larger ranges. Applications of the maintenance-free and battery-less RFID Sensor Transponder will also be demonstrated.

Visitors to the 2018 SPS IPC Drives can find the Fraunhofer IPMS exhibition at Booth 246 in Hall 7a. In addition, Fraunhofer IPMS will feature TSN-capable terminals based on the TSN IP Core at the Industrial Internet Consortium (IIC) Demo Wall (Booth 360, Hall 6), as well as at the Labs Network Industry 4.0 (LNI) Demo Wall (Booth 347, Hall 5). We look forward to seeing you all there!

About Fraunhofer IPMS

The Fraunhofer Institute for Photonic Microsystems IPMS with its more than 300 employees is dedicated to top-level applied research and development in the fields of photonic systems, microsystems technologies, nanoelectronic technologies and wireless microsystems. Innovative processes and products which are based upon our various technologies can be found in all large markets – such as information and communication technologies, consumer products, automobile technology, semi-conductor technology, measurement and medical technology. More than 50 percent of our annual operating expense of 39 million euros is financed by direct commissions from industry. Regarding MEMS based and photonic systems we offer complete solutions: From conception to component right up to complete systems. This includes sample and pilot production in our 1500 m² (15,000 ft²) clean room (ISO 14644-1 class 4) with qualified processes. Additionally, in the area of nanoelectronics our business unit Center Nanoelectronic Technologies CNT provides services in the field of nano- and microelectronics with functional electronic materials, processes and systems, device and integration, maskless lithography and analytics. Another 800 m² of clean room space (ISO 14644-1 class 6) is available for this purpose. In order to meet the demands of our customers,our institute is certified according to the standard DIN EN 9001:2015.

 

tw    fbk    li    li    li
Top of Page