Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Protected Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs.
• See the video and image compression Family Page

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • Intel Accelerator
    • Xiinx PCIe Board

Companion Cores
CAMFE Camera Processor
Network Stacks
40G UDPIP Stack
1G/10G UDPIP Stack
RTP Stack for H.264
RTP Stack for JPEG
• MPEG Transport Stream
  Encapsulator

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

NOR Flash Controllers
Parallel Flash for AHB
SPI Flash
Octal, XIP for AHB
Quad, XIP for AHB
Quad, XIP for AXI

Legacy Peripherals
DMA Controllers
8237, 82380
UARTs
16450S, 16550S, 16750S
Timer/Counter
8254

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

Ethernet MAC
• 1G eMAC Controller

Network Stacks
40G UDPIP Stack
1G/10G UDP/IP stack
• Hardware RTP Stack
  – for H.264
  – for JPEG
• MPEG Transport Stream
  Encapsulator

Automotive Buses
CAN

CAN 2.0/FD controller
CAN FD Reference Design
CAN PHY Daughter Card
CAN Bus VIP
LIN
LIN Bus Master/Slave
SENT/SAE J2716
Tx/Rx Controller
Automotive Ethernet
IEEE 802.1AS Hardware
   Protocol Stack

Avionics/DO-254 Buses
MIL-STD 1553
ARINC 429
ARINC 825 CAN

SPI
Octal SPI
XIP for AHB
Quad SPI
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
Master/Slave VIP
I2C
Master  • Slave

Data Link Controllers
• SDLC & HDLC
UARTs
16450S, 16550S, 16750S

PCI — Target
32-bit, 32-bit multi, 64-bit
PCI — Master
32-bit, 32-bit multi, 64-bit
PCI — Host Bridge
32 bit, 32 bit - AHB
32 bit & device - AHB

These encryption cores make it easy to build security into a variety of systems.

AES
AES, programmable
  CCM, GCM, XTS
Key Expander

DES
DES single
DES triple

Hash Functions
SHA-3 (Keccak)
SHA-256
SHA-1
MD5

by CAST, Inc.

Related Links

Recent news summary page

Download this release (PDF).

Visit Product Datasheet page:

  • MJPEGOIP-HDE Motion JPEG Over IP – HD Video Encoder Subsystem

News CAST Expands Streaming Video IP Line with Motion JPEG Subsystem

WOODCLIFF LAKE, NEW JERSEY, October 19 2016

A new IP subsystem developed by semiconductor intellectual property provider CAST, Inc. makes it easy for system designers to exploit the benefits of Motion JPEG for video streaming in many Internet of Things (IoT) and other applications.

Motion JPEG (MJPEG) provides a leaner, lower-power video solution than video codecs like H.264 when moderate levels of compression are required:

  • MJPEG requires dramatically less silicon area, e.g., the MJPEG-capable encoder from CAST needs about 60K gates and 60Kbits of RAM, while most H.264 encoders need 500K gates and 500Kbits.
  • MJPEG does not need external DRAM memory for buffering frames as is necessary for H.264. (This DRAM can consume more power than the video encoding logic, and its lower bandwidth can be a bottleneck.)
  • MJPEG offers great video quality for moderate compression ratios, e.g. MJPEG delivers video quality practically equivalent to that of H.264 when typical video content is compressed with a ratio of 20:1.

The new Motion JPEG Over IP – HD Video Encoder Subsystem compresses and streams HD video (1080p). It combines the MJPEG Encoder IP core with network stacks (RTP/UDP/IP encapsulation), interfaces, and essential software in an integrated, verified, ready-to-run package.

The MJPEG Subsystem joins CAST’s existing products for streaming HD video over Internet Protocol (IP) channels:

  • Subsystems for H.264 encoding and decoding, and
  • Cores for RTP, UDP/IP, and MPEG Transport Stream network stacks.

All are available now, with turnkey reference design boards and other evaluation and design aids. Customization services are available to deliver these products tailored to meet a customer’s specific system requirements.

Contact CAST Sales via info@cast-inc.com or by calling +1 201.391.8300 to learn more and discuss evaluation and licensing options.

About CAST Inc.

CAST develops, integrates, and aggregates high-quality digital IP cores for ASICs and FPGAs. The company offers some of the best available choices for low-power, high-value IP, including 8051s and BA2x™ 32-bit processors; video, image, and data compression; automotive networking; and the peripherals, interfaces, security, and subsystems needed for the quick, low-risk development of system-on-chip designs. Visit www.cast-inc.com, or follow @castcores on Twitter.

All trademarks are the property of their respective owners.

 

tw    fbk    li    li    li
Top of Page