Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Secure Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs. See the video and image compression Family Page for a media compression overview.

 H.264 Video Decoders
Low Latency Constrained
  Baseline Profile

Low-Power Constrained
  Baseline Profile

 H.265 HEVC Decoders
Main Profile

Companion Cores
Image Processing
WDR/HDR
CAMFE Camera Processor
Network Stacks
40G UDPIP Stack
1G/10G UDPIP Stack
• Hardware RTP Stack
  – for H.264 Encoders
  – for H.264 Decoders
  – for JPEG Encoders
IEEE 802.1Qav & 802.1Qbv
   Stack

• MPEG Transport Stream
  Mux

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

JPEG-LS
Lossless & Near-Lossless
Encoder
Decoder

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • for Intel FPGAs
    • for Xiinx FPGAs

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

Flash Controllers
Parallel Flash
Parallel Flash for AHB
Universal Serial NOR/NAND
   Flash for AHB

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

Automotive Buses
CAN

CAN 2.0/FD controller
CAN FD Reference Design
CAN Bus VIP
Automotive Ethernet
TSN Ethernet Subsystem
CAN-to-TSN Gateway
LIN
LIN Bus Master/Slave
LIN Bus VIP
SENT/SAE J2716
Tx/Rx Controller

Avionics/DO-254 Buses
MIL-STD 1553
ARINC 429

SPI
Octal/Quad/Dual/Single SPI
XIP & DMA for AHB
XIP for AHB
Quad SPI
XIP & DMA for AHB
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
I2C
Master  • Slave

These encryption cores make it easy to build security into a variety of systems.

GEON SoC Security
GEON Security
    Platform

Encryption Primitives
AES
AES, Programmable
  CCM, GCM, XTS
Key Expander
DES
Single, Triple

Hash Functions
SHA
SHA-3 (Keccak)
SHA-256
SHA-1
MD5
MD5

by CAST, Inc.

News Avery, CAST, and Rianta Roll Together on Automotive Ethernet and CAN FD IP and VIP Solutions

TEWKSBURY, MA., November 10 2015

TEWKSBURY, MA., November 10, 2015 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, Rianta Solutions, Inc., a Verification IP provider and System-on-Chip (SoC) integration specialist, and CAST, Inc., a semiconductor intellectual property (IP) provider, today announced they are combining their strengths to develop and deliver superior solutions for the design and verification of automotive networking systems. The resulting set of verification IP (VIP) and IP cores for the CAN FD, LIN, and automotive Ethernet buses will support the latest developments in automotive industry standards and provide more complete integrated design and verification solutions for next-generation automotive sensors, microcontrollers, and Ethernet switch chips and subsystems.

CAST, Avery Design, and Riant partner on CAN FD & LIN IP cores and VIPModern automotive platforms employ different in-car network domains—powertrain, chassis, Advanced Driver Assistance Systems (ADAS), human–machine interfaces (HMI), and future “connected car” systems—that all need to coexist and communicate. Designs are rapidly evolving to use a shared switched Ethernet network backbone with support for heterogeneous subnets and gateways for CAN Flexible Data (ISO 11898-2), LIN, and FlexRay (ISO 17458-1–5) based control systems. System designers need proven, reliable IP cores to integrate these complex functions in an efficient and cost-effective manner. Additionally, test and verification requirements for conformance, interoperability, performance, and security can be greatly enhanced through the use of commercial verification IP models, protocol checking, and compliance testsuite options.

“We are pleased to collaborate with Avery Design to support and build on Avery’s solid VIP foundation in the industry to address the rapidly progressing automotive Ethernet networking and control systems market,” said Richard Deboer, CEO of Rianta.  The Rianta Ethernet VIP provides Ethernet layer 2 MAC model plus layer 3 and 4 functions for 100M-100G applications.  For automotive Ethernet layer 3 functions include 802.1AS (precise synchronization), 802.1Qav (FQTSS), 802.1Qat (SRP), 802.3u (100 Base-TX), and 802.3az (EEE).   VIP is developed in native SystemVerilog UVM and includes traffic generation, protocol checking, and coverage.

“We are excited to work with Avery to help automotive engineers develop safer systems quicker through the industry’s first integrated CAN FD soft IP core and VIP package,” said Nikos Zervas, chief executive officer of CAST. Sourced from CAST partner Fraunhofer IPMS, the feature-rich CAN FD Controller Core is available today in synthesizable RTL for ASICs or optimized netlists for FPGAs. A ready-to-run reference design board and other development aids are also available from CAST to further shorten the time to market for CAN FD based systems.

The Avery CAN 2.0 and FD VIP supports the latest ISO specifications including the latest 11898-2 revision. Models and compliance testsuites for all modes are supported.  VIP is developed in native SystemVerilog UVM and includes traffic generation, protocol checking, and coverage.

Visit Avery at the DVCon Europe (DAC) November 11-13 in booth #E2 to learn more about Avery, Rianta, and CAST IP and VIP solutions.


About Avery Design Systems

Founded in 1999, Avery Design Systems, Inc. enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of formal analysis applications for RT-level and gate-level X verification; robust core-through-chip-level Verification IP for PCI Express, USB, AMBA, UFS, MIPI CSI, DSI, Soundwire, and Unipro, DDR/LPDDR, HBM, HMC, ONFI/Toggle, NVM Express, SATA Express, eMMC, SD/SDIO, CAN FD, and I2C standards.  The company has established numerous Avery Design VIP partner program affiliations with leading IP suppliers. More information about the company may be found at www.avery-design.com.

About Rianta Solutions

The Rianta team has been working together for over 15 years delivering solutions to complex problems for leading datacenter equipment and semiconductor vendors. With a long history of consistently delivering high quality multi-hundred million gate SoCs, turnkey FPGAs and UVM verification environments, Rianta partners with our customers by taking joint ownership in successfully delivering silicon products. More information about Rianta is found at www.riantasolutions.com.

About CAST

CAST is a twenty-year-old developer, integrator, and aggregator of IP cores for ASICs and FPGAs. The company offers some of the best available choices for low-power, high-value IP, including 8051s and BA2x 32-bit Processors; video, image, and data compression; security, interfaces and other functions needed for complete system on chip designs. Visit www.cast-inc.com, or follow @castcores on Twitter.

 

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