Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Protected Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs.
• See the video and image compression Family Page

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

JPEG LS
Encoder
Lossless & Near-Lossless

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • Intel Accelerator
    • Xiinx PCIe Board

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

NOR Flash Controllers
Parallel Flash for AHB
SPI Flash
Octal, XIP for AHB
Quad, XIP for AHB
Quad, XIP for AXI

Legacy Peripherals
DMA Controllers
8237, 82380
UARTs
16450S, 16550S, 16750S
Timer/Counter
8254

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

Ethernet MAC
• 1G eMAC Controller

Network Stacks
40G UDPIP Stack
1G/10G UDP/IP stack
• Hardware RTP Stack
  – for H.264
  – for JPEG
• MPEG Transport Stream
  Encapsulator

Automotive Buses
CAN

CAN 2.0/FD controller
CAN FD Reference Design
CAN PHY Daughter Card
CAN Bus VIP
LIN
LIN Bus Master/Slave
SENT/SAE J2716
Tx/Rx Controller
Automotive Ethernet
IEEE 802.1AS Hardware
   Protocol Stack

Avionics/DO-254 Buses
MIL-STD 1553
ARINC 429
ARINC 825 CAN

SPI
Octal SPI
XIP for AHB
Quad SPI
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
Master/Slave VIP
I2C
Master  • Slave

Data Link Controllers
• SDLC & HDLC
UARTs
16450S, 16550S, 16750S

PCI — Target
32-bit, 32-bit multi, 64-bit
PCI — Master
32-bit, 32-bit multi, 64-bit
PCI — Host Bridge
32 bit, 32 bit - AHB
32 bit & device - AHB

These encryption cores make it easy to build security into a variety of systems.

AES
AES, programmable
  CCM, GCM, XTS
Key Expander

DES
DES single
DES triple

Hash Functions
SHA-3 (Keccak)
SHA-256
SHA-1
MD5

by CAST, Inc.

Related Links

Recent news summary page

Download this release (PDF).

Visit Product Datasheet page:

  • ZipAccel-C GZIP/ZLIB/Deflate Data Compression Core
  • ZipAccel-D GUNZIP/ZLIB/Inflate Data Decompression Core

News CAST Introduces Secure GZIP/Deflate Data Compression IP Cores from Sandgate Technologies

Woodcliff Lake, NJ and Chester Springs, PA, January 28 2015

Intellectual property provider CAST, Inc. is making secure, efficient, hardware-based data compression easier for designers to build into systems by adding data compression cores sourced from new partner Sandgate Technologies to its line of processors, peripherals, and other semiconductor IP.

The ZipAccel-C Compression and ZipAccel-D Decompression IP Cores are hardware lossless compression engines that comply with the popular Deflate/Inflate, GZIP/GUNZIP, and ZLIB compression standards. Configurable options (including encryption) help designers optimize feature, performance, and area trade-offs for each particular system.

The cores deliver what CAST believes are the best performance figures in the industry, enabling:

  • Single threaded data throughput in excess of 100Gbps even in low-cost FPGAs, exceeding that of acceleration boards and ASSPs currently in
    the market;
  • Hardware compression efficiency that matches the highest degree of compression possible in software (i.e., Unix/Linux “gzip -9”); and
  • Compression latency lower than 15 clock cycles, making feasible the use of compression for the memory interfaces within SoCs.

“The engineers at Sandgate Technologies are among the world’s most experienced in designing and delivering hardware data compression, and we are proud to establish this new partnership with them,” said Nikos Zervas, chief operating officer for CAST. “These fast, full-featured, resource-saving compression cores are perfect for offloading processors, cutting memory size and cost, speeding wireless or networked communication, and other critical factors in both traditional and new applications.”

“We have worked to perfect hardware compression technology over many years and through multiple customer iterations, and are very proud of the state-of-the-art versions we’re shipping today,” said Chad Spackman, chief executive officer for Sandgate Technologies. “We’re very excited to begin this new partnership with CAST, and through them to help more customers solve difficult product challenges by optimizing and deploying efficient data compression.”

Capable, Configurable Hardware Compression and Decompression

The ZipAccel compression cores support the latest applicable standards: GZIP/GUNZIP (RFC-1952), Inflate/Deflate (RFC-1951), and ZLIB (RFC-1950). They work in standalone fashion independent of a CPU, and so can offload compression and encryption responsibilities from a system processor. The compressor produces files with the compressed data payload properly encapsulated, so no post-processing is required.

Memory blocks can optionally support Error Correction Codes (ECC) to help satisfy Enterprise Class data integrity requirements, and users can tune inter-file latency to meet stringent Quality of Service (QoS) objectives. Choices of streaming data and bus interfaces help simplify system integration.

Encryption is handled through optional integration with AES-XTS and AES-GCM IP cores. The delivered compression/encryption subsystem remains easy to integrate and use, with excellent performance and latency characteristics.

An included software model helps designers analyze processing speed and resource utilization versus compression efficiency to achieve the best combination of options and feature settings for their particular application. Support from Sandgate’s experienced team of compression engineers is also available to help customers optimize their systems.

ZipAccel Compression Cores:
Example Applications

Real-Time Compression/Decompression
Make 10Gbps optical or microwave links look 25Gbps.
Memory Controller Integration
Compress into/out of on-the-fly to make system RAM seem 2.5x larger.
Flash Memory Controllers
Virtually increase the capacity of thumb drives or SSDs by 2.5x.
SoC Acceleration
Replace larger processors doing software compression with smaller, cheaper processors coupled with a hardware compressor.
Big Data Server Farm Cost Reductions
Significantly increase communication link and storage capacities, reducing operating cost and/or improving download speeds.
Web Server Integration
Compress pages and resources for faster transmission and display.
Quicker Start Up for Smart TV
Reduce the boot code to be read from low-speed flash to please customers with three times quicker boot up display.

Superior Solutions for Many Applications

Their excellent performance, easy configurability, and optional encryption make the ZipAccel cores suitable for a wide variety of applications.

SoCs integrating ZipAccel cores can readily out-perform software compression or stand-alone hardware compression units used for conventional applications like off-system storage or data communication. Internet of Things (IoT), wearables, and similar devices benefit when data compression reduces the time their energy-hungry radio frequency (RF) transmitters must operate.

ZipAccel’s exceptionally low latency and silicon usage also make possible new applications not previously feasible. For example, compression within an SoC to reduce the bandwidth and size of its central DDR memory yields savings in both memory bandwidth and energy consumption.

Deliverables and Availability

The ZipAccel cores can be licensed as soft cores (RTL) for ASICs or firm cores (netlists) for FPGAs.

Already silicon-proven in several commercial products, the new cores will be available through CAST worldwide next month, with the high quality packaging standards, simple licensing, and effective support upon which the 20-year-old IP provider has built its reputation.

Interested customers should contact CAST Sales now to learn more, at +1 201.391.8300 or info@cast-inc.com.

About Sandgate Technologies

Sandgate's mission is to provide scalable IP and technology well suited for extraordinary performance in single and multi-stream networking use cases. The company’s core team of engineers began working together in 1996 and has remained focused together on data compression and networking through several corporate iterations, most notably within CebaTech from 2004–2010. Today Sandgate is based near Philadelphia, and offers standard and tailored hardware compression solutions and the consulting expertise to help designers deploy these solutions. Visit www.sandgate.com to learn more.

About CAST, Inc.

CAST is a twenty-year-old provider of IP cores and subsystems for ASICs and FPGAs. The company offers some of the best available choices for low-power, high-value IP , including 8051s and BA2x 32-bit Processors; video, image, and data compression; security, interfaces and other functions needed for complete system on chip designs. To learn more about CAST and its product line call +1 201.391.8300, visit www.cast-inc.com, or follow @castcores on Twitter.
 

 

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