Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Protected Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs.
• See the video and image compression Family Page

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

JPEG LS
Encoder
Lossless & Near-Lossless

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • Intel Accelerator
    • Xiinx PCIe Board

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

NOR Flash Controllers
Parallel Flash for AHB
SPI Flash
Octal, XIP for AHB
Quad, XIP for AHB
Quad, XIP for AXI

Legacy Peripherals
DMA Controllers
8237, 82380
UARTs
16450S, 16550S, 16750S
Timer/Counter
8254

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

Ethernet MAC
• 1G eMAC Controller

Network Stacks
40G UDPIP Stack
1G/10G UDP/IP stack
• Hardware RTP Stack
  – for H.264
  – for JPEG
• MPEG Transport Stream
  Encapsulator

Automotive Buses
CAN

CAN 2.0/FD controller
CAN FD Reference Design
CAN PHY Daughter Card
CAN Bus VIP
LIN
LIN Bus Master/Slave
SENT/SAE J2716
Tx/Rx Controller
Automotive Ethernet
IEEE 802.1AS Hardware
   Protocol Stack

Avionics/DO-254 Buses
MIL-STD 1553
ARINC 429
ARINC 825 CAN

SPI
Octal SPI
XIP for AHB
Quad SPI
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
Master/Slave VIP
I2C
Master  • Slave

Data Link Controllers
• SDLC & HDLC
UARTs
16450S, 16550S, 16750S

PCI — Target
32-bit, 32-bit multi, 64-bit
PCI — Master
32-bit, 32-bit multi, 64-bit
PCI — Host Bridge
32 bit, 32 bit - AHB
32 bit & device - AHB

These encryption cores make it easy to build security into a variety of systems.

AES
AES, programmable
  CCM, GCM, XTS
Key Expander

DES
DES single
DES triple

Hash Functions
SHA-3 (Keccak)
SHA-256
SHA-1
MD5

by CAST, Inc.

Related Links

Recent news summary page

Download this release (PDF).

Visit Product Datasheet page:

  • BA20 PipelineZero 32-bit Embedded Processor

News New BA20 Processor IP Features “Zero-Stage Pipeline” for Energy and Performance Efficiency

PipelineZero Architecture, hazards-free single-cycle execution, extreme code density, small silicon area, and power-saving design yield one of the most performance- and energy-efficient 32-bit processors available

Linley Processor Conference, Santa Clara, CA, October 22 2014

Wearable devices, Internet of Things (IoT) sensors, and other mobile products challenge the limits of modern processor efficiency, with features requiring significant processing capability but also demanding ultra-low energy consumption. A new 32-bit processor announced today by Beyond Semiconductor and CAST Inc. meets this challenge by combining state-of-the-art design techniques with an architectural feature seemingly drawn from the past: a zero-stage execution pipeline the companies call the PipelineZero™ Architecture.

The new BA20™ PipelineZero 32-bit Embedded Processor IP Core is designed specifically for the most power-sensitive systems, where the usual low-power processor techniques fall short of reaching power targets. Operating at high efficiency with no wasted cycles and maximizing the work accomplished per energy consumed, the BA20 is a new sweet-spot processor for applications not requiring the high operating frequency of modern three- or five-stage pipelined processors. It delivers extremely competitive results for these applications, featuring:

BA20 Efficiency and Size

Compared to the popular processor line from ARM Ltd., the BA20 Processor provides efficiency comparable to the Cortex®-M4, but with a small size similar to the Cortex®-M0+.

 

  • Competitive Performance Efficiency:
    3.04 DMIPS/MHz and 3.41 CoreMarks/MHz
  • Small Silicon Area:
    0.01mm2 in a 9-track 40G process, and
  • Low Power Consumption:
    2µW/MHz in the same process technology.

 

Beyond Semiconductor achieved these results through design techniques already proven in the BA2X™ Processor Family combined with rigorous fine-grained optimizations to minimize switching plus the unique PipelineZero microarchitecture.

The BA20 Processor offers true single-cycle instruction execution of the BA2™ Instruction Set, which reduces system-wide power usage through industry-leading extreme code density. The processor’s high level of performance efficiency means it can save energy by doing more in less time—sleeping for more of the time—and by operating at lower clock rates. Built-in support for advanced power management techniques such as power and clock gating and dynamic frequency scaling further reduce energy consumption.

BA20 Pipeline Architecture

The BA20’s PipelineZero Architecture uses a zero-stage execution pipeline that offers greater performance efficiency than typical multi-stage processors.

The BA20’s PipelineZero Architecture provides zero-delay branches and no pipeline-stalling overheads. It:

  • Eliminates hazards (data, structural, and branch) for higher performance efficiency;
  • Has fewer pipeline registers—requiring a minimal number of flip-flops—and a simplified CPU control for smaller area; and
  • Has a shorter branch shadow for less wasted energy.

Designers can optionally augment the processor’s capabilities with a hardware multiplier/divider, a multiply-accumulate block, and IEEE-754 compliant floating-point units. A vectored interrupt controller facilitates timely responses to interrupts, and an optional memory protection unit protects application code and/or data from corruption. The core’s system interface uses a 32-bit wide AMBA® AXI4-lite bus. Two tightly-coupled embedded memory (EMEM) buses allow fast access for time-critical code and data, and can be used for inter-core communication in a multi-core architecture.

The royalty-free BA20 Processor IP Core is available now in RTL source code or FPGA netlists, complete with the BeyondStudio™ Eclipse-based IDE. Various pre-integrated peripherals, memory controllers, and interconnects are available, as are a non-intrusive JTAG or serial debug package and ready-to-run reference design boards.

Attendees of the Linley Processor Conference can learn more about the new BA20 Processor in a presentation by CAST’s Bill Finch at 1:20 pm on October 22, 2014.

To learn more about CAST and its line of IP cores and subsystems, call +1 201.391.8300, visit www.cast-inc.com, or follow @castcores on Twitter. Access further information on Beyond Semiconductor by visiting www.beyondsemi.com. # # #

BA20, PipelineZero, BA2x, and BeyondStudio are trademarks of Beyond Semiconductor. All other trademarks are the property of their respective owners.

 

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