Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Protected Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs. See the video and image compression Family Page for a media compression overview.

 H.264 Video Decoders
Low Latency Constrained
  Baseline Profile

Low-Power Constrained
  Baseline Profile

 H.265 HEVC Decoders
Main Profile

Companion Cores
Image Processing
WDR/HDR
CAMFE Camera Processor
Network Stacks
40G UDPIP Stack
1G/10G UDPIP Stack
• Hardware RTP Stack
  – for H.264 Encoders
  – for H.264 Decoders
  – for JPEG Encoders
IEEE 802.1Qav & 802.1Qbv
   Stack

• MPEG Transport Stream
  Mux

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

JPEG-LS
Lossless & Near-Lossless
Encoder
Decoder

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • for Intel FPGAs
    • for Xiinx FPGAs

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

Flash Controllers
Parallel Flash
Parallel Flash for AHB
Universal Serial NOR/NAND
   Flash for AHB

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

Automotive Buses
CAN

CAN 2.0/FD controller
CAN FD Reference Design
CAN Bus VIP
LIN
LIN Bus Master/Slave
SENT/SAE J2716
Tx/Rx Controller
Automotive Ethernet
TSN Ethernet Subsystem

Avionics/DO-254 Buses
MIL-STD 1553
ARINC 429
ARINC 825 CAN

SPI
Octal/Quad/Dual/Single SPI
XIP & DMA for AHB
XIP for AHB
Quad SPI
XIP & DMA for AHB
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
I2C
Master  • Slave

These encryption cores make it easy to build security into a variety of systems.

GEON SoC Security
GEON Security
    Platform

Encryption Primitives
AES
AES, Programmable
  CCM, GCM, XTS
Key Expander
DES
Single, Triple

Hash Functions
SHA
SHA-3 (Keccak)
SHA-256
SHA-1
MD5
MD5

by CAST, Inc.

Related Links

Recent news summary page

Download this release (PDF).

Datasheets:

News CAST adds H.264 Main Profile Video Encoder Core to Compression IP Family

Woodcliff Lake, NJ, January 26 2011

This product is no longer available to license from CAST. Please contact CAST Sales for more info.

Semiconductor intellectual property (IP) provider CAST, Inc. has expanded its suite of video and image compression IP with a new H.264 Main Profile Video Encoder core (http://www.cast-inc.com/ip-cores/video/h264-mp-e/).

The new core complements the Baseline Profile encoder CAST already offers by delivering better video compression with only a small increase in chip size. Both encoders are sourced from technology partner Alma Technologies S.A, and are distinguished by three factors:

Extremely high quality video output. This was the top design priority, and typical compromising shortcuts were avoided. CAST can provide objective measures of the successful results, and a software model or prototype board for subjective evaluation by potential customers.

Easier system integration and application support. Integration in a variety of hardware systems is facilitated by flexible, streaming-capable interfaces; stand-alone, processor-free operation; and a low-bandwidth, latency-tolerant, external memory interface that’s independent of memory type and pin-compatible with popular controllers. Run-time tunable parameters and switching between modes—Constant Bit Rate, Variable Bit Rate, or Intra-Only—ensure suitability for a variety of applications and compatibility with even limited-functionality decoders.

Economical, efficient performance. The encoders’ performance and area characteristics are extremely competitive. They enable Full HD, 1920x1080p 30 frames per second (fps) video in inexpensive FPGAs, and beyond 1920x1080p at 60 fps in ASICs.

“Support for the H.264 standard, specific profiles, operating levels, resolutions, and bit rates is only part of the story when considering video encoder cores,” said Nikos Zervas, vice president of marketing for CAST. “There is a considerable degree of freedom in choosing specific techniques and methods when designing an H.264 encoder. For this encoder, every such decision was taken in favor of achieving the highest quality possible, and new, custom techniques were devised for the most critical functions.”

Motion estimation, for example, significantly impacts video quality, and the cores use the most powerful search algorithm (Full Search) as well as all the coding tools the H.264 standard makes available (Variable Block Size, with ¼ pixel accuracy).

The superior video quality is largely a result of two features: an especially efficient mode selection algorithm, and an advanced rate control implementation based on run-time adaptive content complexity and rate-distortion models. Excellent adaptability to temporal and spatial content variations—enabled by quantization adjustments performed on a sub-frame basis—as well as respect to the decoder’s decoding buffer (HRD compliance) achieve a level of live streaming quality rarely met in hardware encoders. Frame sizes from QCIF to 4Kx4K pixels and compliance up to level 5.1 for both CABAC and CAVLC coders further make these excellent choices for applications ranging from severe low-bandwidth situations to those with data transmission requirements as high as 240 Mbps.

The new H264-MP-E Main Profile Encoder core with its greater compression results is available now, as is the smaller H264-BP-E Baseline Profile Encoder core. The cores are available in RTL source for ASICs, or netlists for FPGAs from multiple vendors.

CAST will be running live demonstrations of the new H.264 encoder core at: EDSF 2011, Yokohama, Japan, Jan. 26-27 (booth 207), and DesignCon 2011, Santa Clara, California, Feb. 1-2, booth 710.

Learn about all the video and image compression IP CAST offers by calling (+1 201.391.8300) or visiting http://www.cast-inc.com/ip-cores/images/.

CAST is a trademark of CAST, Inc. All other trademarks are the property of their respective owners.

 

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