Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Protected Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs. See the video and image compression Family Page for a media compression overview.

 H.264 Video Decoders
Low Latency Constrained
  Baseline Profile

Low-Power Constrained
  Baseline Profile

 H.265 HEVC Decoders
Main Profile

Companion Cores
Image Processing
WDR/HDR
CAMFE Camera Processor
Network Stacks
40G UDPIP Stack
1G/10G UDPIP Stack
• Hardware RTP Stack
  – for H.264 Encoders
  – for H.264 Decoders
  – for JPEG Encoders
IEEE 802.1Qav & 802.1Qbv
   Stack

• MPEG Transport Stream
  Mux

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

JPEG-LS
Lossless & Near-Lossless
Encoder
Decoder

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • for Intel FPGAs
    • for Xiinx FPGAs

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

Flash Controllers
Parallel Flash
Parallel Flash for AHB
Universal Serial NOR/NAND
   Flash for AHB

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

Automotive Buses
CAN

CAN 2.0/FD controller
CAN FD Reference Design
CAN Bus VIP
LIN
LIN Bus Master/Slave
SENT/SAE J2716
Tx/Rx Controller
Automotive Ethernet
TSN Ethernet Subsystem

Avionics/DO-254 Buses
MIL-STD 1553
ARINC 429
ARINC 825 CAN

SPI
Octal/Quad/Dual/Single SPI
XIP & DMA for AHB
XIP for AHB
Quad SPI
XIP & DMA for AHB
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
I2C
Master  • Slave

These encryption cores make it easy to build security into a variety of systems.

GEON SoC Security
GEON Security
    Platform

Encryption Primitives
AES
AES, Programmable
  CCM, GCM, XTS
Key Expander
DES
Single, Triple

Hash Functions
SHA
SHA-3 (Keccak)
SHA-256
SHA-1
MD5
MD5

by CAST, Inc.

Related Links

Recent news summary page

Download this release (PDF).

News CAST Releases DSP Coprocessor for Cortus APS 32-bit Processor Cores

APS-DSP Coprocessor helps overcome the programming and hardware challenges of Digital Signal Processing applications for the 8051 upgrade market

InStat Microprocessor Forum, San Jose, California, May 22 2007

APS-DSP has been discontinued. Please contact Sales to learn more.

Semiconductor intellectual property (IP) provider CAST, Inc. today announced the availability of a Digital Signal Processing (DSP) coprocessor for the APS family of 32-bit processor IP cores.

Introduced a year ago, the APS family brings 32-bit processing power to designers more familiar with 8051s and other 8-bit microcontrollers. The new APS-DSP continues this approach, offering simple programming and adding fast math operations and optimized data handling to effectively support multimedia and other demanding analog or mixed-signal applications.

“Customers have found that APS delivers a real sweet-spot combination of fast processing, small area, and low power that’s perfect for many applications” said Hal Barbour, president of CAST. “This easy DSP coprocessor means designers can now succeed in an exploding market where products need to have voice recognition, streaming video, or other slick features just to get noticed.”

The APS-DSP and the APS family of processors are developed by CAST partner Cortus, S.A. in France. The coprocessor is available now as an integrated add-on to the APS2 and APS3 processor cores, and is ready for implementation in ASICs, structured ASICs, or FPGAs.

About the APS-DSP

The APS-DSP is a fixed point, general purpose, 16-bit extension to the APS family of processors. It expands the APS instruction set with special DSP functions, and adds additional processing and memory interface hardware to significantly improve performance for complex arithmetic calculations.

The patented coprocessor interface built into APS processors enables tight integration and parallel operation of the DSP and main CPU functions. This means instructions complete in a single cycle, with the DSP coprocessor and the main processor executing instructions at the same speed, and with out-of-order instruction completion.

The coprocessor adds three arithmetic logic units (ALUs) operating in parallel, improving performance by enabling one arithmetic operation and two address calculations on every clock cycle. It adds two memory interfaces for greater memory bandwidth, and uses a Harvard bus architecture for simple memory design. A bit-reverse arithmetic feature facilitates certain DSP calculations, and special Zero Overhead Loop (ZOL) hardware enables smarter, more efficient data processing.

Instructions for the APS-DSP are written in efficient assembler language using a simple, straightforward, set of constructs. Provided macros make it easy to work with the DSP routines from the C and C++ programming environments of the APS processors. An included library offers pre-coded solutions for typical DSP challenges such as Fast Fourier Transforms (FFTs) and common architectures for both Finite Impulse Response (FIR) and Infinite Impulse Response (IIR) digital filters. Designers can use these specific solutions without having the detailed DSP expertise necessary to implement the algorithms from scratch.

The 16-bit APS-DSP works with both members of the APS family, the 32-bit APS2 for high performance, and the 16/32-bit APS3 for dense code. Designed primarily as 8051 upgrades for deeply embedded systems, APS cores offer significantly more capability and speed than 8-bit processors while conserving silicon area, power, and cost compared to popular 32-bit processors. Multiple customers have selected APS over the past year, and the first customer designs are nearing production.

About Cortus S.A.

Cortus S.A. is privately-held company that designs and licenses innovative, highly efficient 32-bit processor cores and IP around those processor cores. Designed to replace 8-bit controllers in deeply embedded systems, Cortus processors are uniquely small and power-efficient yet have advanced capabilities such as out-of-order instruction completion. The company is based in Montpellier, France. Learn more by visiting www.cortus.com.

About CAST, Inc.

CAST provides over 100 popular and standards-based IP cores for ASICs and FPGAs. Privately owned and operating since 1993, CAST has established a reputation for high-quality IP products, simple licensing, and responsive technical support. The company is headquartered near New York City, partners with IP developers around the world, and works with select sales consultants and distributors throughout Europe and Asia.

CAST is a trademark of CAST, Inc.
All other trademarks are the property of their respective owners.

 

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