Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Protected Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs. See the video and image compression Family Page for a media compression overview.

 H.264 Video Decoders
Low Latency Constrained
  Baseline Profile

Low-Power Constrained
  Baseline Profile

 H.265 HEVC Decoders
Main Profile

Companion Cores
Image Processing
WDR/HDR
CAMFE Camera Processor
Network Stacks
40G UDPIP Stack
1G/10G UDPIP Stack
• Hardware RTP Stack
  – for H.264 Encoders
  – for H.264 Decoders
  – for JPEG Encoders
IEEE 802.1Qav & 802.1Qbv
   Stack

• MPEG Transport Stream
  Mux

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

JPEG-LS
Lossless & Near-Lossless
Encoder
Decoder

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • for Intel FPGAs
    • for Xiinx FPGAs

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

Flash Controllers
Parallel Flash
Parallel Flash for AHB
Universal Serial NOR/NAND
   Flash for AHB

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

Automotive Buses
CAN

CAN 2.0/FD controller
CAN FD Reference Design
CAN Bus VIP
LIN
LIN Bus Master/Slave
SENT/SAE J2716
Tx/Rx Controller
Automotive Ethernet
TSN Ethernet Subsystem

Avionics/DO-254 Buses
MIL-STD 1553
ARINC 429
ARINC 825 CAN

SPI
Octal/Quad/Dual/Single SPI
XIP & DMA for AHB
XIP for AHB
Quad SPI
XIP & DMA for AHB
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
I2C
Master  • Slave

These encryption cores make it easy to build security into a variety of systems.

GEON SoC Security
GEON Security
    Platform

Encryption Primitives
AES
AES, Programmable
  CCM, GCM, XTS
Key Expander
DES
Single, Triple

Hash Functions
SHA
SHA-3 (Keccak)
SHA-256
SHA-1
MD5
MD5

by CAST, Inc.

Related Links

Recent news summary page

Download this release (PDF).

See the datasheet:

  • CAN-CTRL Flexible CAN 2.0 Bus Controller Core

News Intellectutal Property Support For New FPGA Familes Announced By Lattice Semiconductor And CAST Incorporated

IP Cores Implement CAN Bus and IEEE 1394 Protocols Commonly Found In High-Volume Systems

HILLSBORO, OR / WOODCLIFF LAKE, NJ, September 02 2004

C1394A has been discontinued. Please contact Sales to learn more.
CAN core has been replaced with CAN-CTRL.

Lattice Semiconductor Corporation (NASDAQ: LSCC) and its IP partner, CAST Incorporated, today announced intellectual property (IP) support for the new LatticeECP-DSP™ (“EConomy Plus DSP”) and LatticeEC™ (“EConomy”) FPGA device families. Through the Lattice ispLeverCORE™ Connection partner program, CAST will provide a range of complete system solutions for their customers who are integrating system-level IP with the most advanced silicon architectures from Lattice. The Lattice partners program is designed to allow customers to easily access and integrate approved third-party IP products using Lattice programmable devices.

“IP support for our new FPGA families continues to grow at an impressive rate. The combination of the CAST CAN Bus Controller and IEEE 1394 IPs with the optimized LatticeECP™ and EC architectures is an excellent approach to a variety of high-volume, cost-sensitive applications,” said Stan Kopec, Lattice vice president of corporate marketing. “CAST is uniquely positioned to provide IP supporting these serial bus standards in the latest generation Lattice devices,” Kopec concluded.

Hal Barbour, President of CAST Incorporated said, “The new LatticeECP and LatticeEC devices, and associated ispLEVER® tools, represent a pronounced enhancement to the previous generation of Lattice FPGAs; we are excited to implement these key IP cores for the Lattice low-cost devices.”

LatticeECP and LatticeEC Cores from CAST

CAST has ported, optimized and tested two popular IP cores on the new Lattice FPGA devices, the IEEE 1394a (FireWire) Link Layer Controller and the CAN Bus Controller, with competitive implementation results:

CAST IP Available for LatticeECP & LatticeEC

CAST Product LUTs Speed
CAN: CAN Bus Controller 1619 >40Mhz
C1394A: IEEE1394a Link Layer Controller 6371 >400Mbps

 

Full datasheets for these cores are available on the Lattice Web site: www.latticesemi.com/products/devtools/ip/cast/index.cfm

These Connection Cores are available in netlist format for immediate purchase from CAST. CAST also offers a variety of additional packaging and licensing options to suit specific customer needs. By leveraging partner products, customers can quickly implement a wide variety of functions in Lattice programmable devices.

About the LatticeECP-DSP and LatticeEC FPGA Families

Announced June 28, 2004, the LatticeECP-DSP and LatticeEC FPGA device families are architected to provide the most optimized feature sets combined with the lowest total solution costs of any FPGAs. The new LatticeECP-DSP products, targeted for high-performance DSP applications, provide up to a 50% performance and 75% logic utilization improvement over other low-cost solutions when implementing common DSP functions. The LatticeEC FPGA product family, targeted for general-purpose FPGA applications, is a precise and targeted response to the market’s explosive demand for low-cost, architecturally streamlined logic solutions. Through advanced 130nm silicon technology, an optimized architecture and proprietary circuit design, the new Lattice devices lower total solution costs by up to 30% to 50% compared with existing FPGA solutions, and are expected to broaden the adoption of FPGAs within the $20 billion ASIC marketplace.

About CAST Incorporated

CAST provides about 100 popular and standards-based IP cores for ASICs and FPGAs. Privately owned and operating since 1993 with a focus on making IP practical and affordable, CAST has established a reputation for high-quality IP products, simple licensing, and responsive technical support. The company is headquartered near New York City, and works with an international network of IP developers and distributors. Company headquarters are located at 11 Stonewall Court, Woodcliff Lake, NJ 07677, USA; Telephone 201-391-8300; FAX 201-391-8694. For more information about CAST, visit www.cast-inc.com.

About Lattice Semiconductor

Lattice Semiconductor Corporation designs, develops and markets the broadest range of Field Programmable Gate Arrays (FPGA), Field Programmable System Chips (FPSC) and high-performance ISPTM Programmable Logic Devices (PLD), including Complex Programmable Logic Devices (CPLD), Programmable Analog Chips (PAC™), and Programmable Digital Interconnect (GDX™). Lattice also offers industry leading SERDES products. Lattice is "Bringing the Best Together" with comprehensive solutions for today's system designs, delivering innovative programmable silicon products that embody leading-edge system expertise.

Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communications, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124-6421, USA; telephone 503-268-8000, fax 503-268-8037. For more information about Lattice Semiconductor Corporation, visit www.latticesemi.com.

Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties including market acceptance and demand for our new products, our dependencies on our silicon wafer and intellectual property suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements.

# # #

Lattice Semiconductor Corporation, Lattice (& design), L (& design), ISP, LatticeEC, LatticeECP, LatticeECP-DSP, ispLEVER, ispLeverCORE, GDX, PAC and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.

GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.

CAST is a trademark of CAST, Inc.
All other trademarks are the property of their respective owners.

 

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