Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Protected Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs. See the video and image compression Family Page for a media compression overview.

 H.264 Video Decoders
Low Latency Constrained
  Baseline Profile

Low-Power Constrained
  Baseline Profile

 H.265 HEVC Decoders
Main Profile

Companion Cores
Image Processing
WDR/HDR
CAMFE Camera Processor
Network Stacks
40G UDPIP Stack
1G/10G UDPIP Stack
• Hardware RTP Stack
  – for H.264 Encoders
  – for H.264 Decoders
  – for JPEG Encoders
IEEE 802.1Qav & 802.1Qbv
   Stack

• MPEG Transport Stream
  Mux

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

JPEG-LS
Lossless & Near-Lossless
Encoder
Decoder

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • for Intel FPGAs
    • for Xiinx FPGAs

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

Flash Controllers
Parallel Flash
Parallel Flash for AHB
Universal Serial NOR/NAND
   Flash for AHB

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

Automotive Buses
CAN

CAN 2.0/FD controller
CAN FD Reference Design
CAN Bus VIP
LIN
LIN Bus Master/Slave
SENT/SAE J2716
Tx/Rx Controller
Automotive Ethernet
TSN Ethernet Subsystem

Avionics/DO-254 Buses
MIL-STD 1553
ARINC 429
ARINC 825 CAN

SPI
Octal/Quad/Dual/Single SPI
XIP & DMA for AHB
XIP for AHB
Quad SPI
XIP & DMA for AHB
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
I2C
Master  • Slave

These encryption cores make it easy to build security into a variety of systems.

GEON SoC Security
GEON Security
    Platform

Encryption Primitives
AES
AES, Programmable
  CCM, GCM, XTS
Key Expander
DES
Single, Triple

Hash Functions
SHA
SHA-3 (Keccak)
SHA-256
SHA-1
MD5
MD5

by CAST, Inc.

Related Links

Recent news summary page

Download this release (PDF).

News CAST IP Cores for Motion Processing Enable MPEG-2 and MPEG-4 Designs

Flexible MoPro core available now with software encode/decode; fast, compact cores for hardware MPEG available soon

(EDA and Test Expo) Hsinchu, Taiwan, October 04 2002

MoPro core has been discontinued. Please contact Sales to learn more.

Semiconductor intellectual property (IP) provider CAST, Inc. today announced a new series of motion processing cores for high-performance video compression and decompression. These cores enable the quick and cost-effective development of real-time video systems such as digital video recorders, wireless communication devices, sophisticated surveillance systems, and other products employing the popular MPEG-2 and newer MPEG-4 standards.

The CAST MoPro motion estimation/compensation core is available now for ASICs or programmable devices. It provides a hardware implementation handling 90% of the computational processing necessary for real time video using encoding standards such as MPEG-1, MPEG-2, MPEG-4, and H263+. Meant to work with an embedded processor and algorithm-specific software, the MoPro core frees designers from the most challenging aspects of video compression while offering system design flexibility. Reference design software layers for MPEG-2 and MPEG-4 are available as options for this core.

Upcoming MPEG cores go even further, providing complete hardware implementations of specific video compression algorithms. An MPEG-4 core available by the end of this year is expected to offer full video processing (640 x 480 pixels frames at 30 frames per second) and to require just 100,000 gates. A similar high-performance, low-area MPEG-2 core will be available early next year.

“Video is fast becoming an expected part of the digital lifestyle,” said Hal Barbour, president of CAST. “Our MoPro core gives graphics system developers a powerful engine to drive all their video applications, while our MPEG cores will provide the benefits of specific algorithms in ready-to-roll IP, bringing full motion video to a wider range of smaller, cheaper products.”

About the MoPro Motion Processing Core

The MoPro core accepts a video stream and outputs the motion vectors and transformed, quantized prediction error data needed for further video processing. It includes an IEEE-1180 compliant discrete cosine transform (DCT) quantizer and inverse DCT dequantizer, which perform most of the computation required for video compression. A processor interface allows control of the core through the selection of options such as image resolution, data format, and search criteria, and the core has a glueless interface to SDRAM for frame storage.

The core’s significant yet flexible processing capability makes it suitable as the central element in a variety of video processing applications. Designers need only implement the lossless stage of their chosen compression algorithm (Huffman encoding, run length decoding, etc.) to form a complete standard-based solution. Reference design software packages that implement the MPEG-2 and MPEG-4 standards are available as options for the MoPro core.

The MoPro core is a synchronous design, and is available in VHDL or Verilog for ASICs or netlists for programmable devices from Altera and Xilinx. Sample implementations include:

Technology

ASIC
0.18µ process

Xilinx
Virtex II

Approx. Area

35K gates and
17.5 Kbits RAM

3,500 slices and
8 RAM blocks

Speed

> 100 Mhz

> 70 Mhz

 

Video Throughput

800 x 600 frames
at 25 fps

up to 640 x 480 frames

at 30 fps

See the CAST web site for more information (http://www.cast-inc.com/cores/motion). The MoPro core is developed by CAST partner Ocean Logic, Pty Ltd. In Australia. (www.ocean-logic.com).

About CAST, Inc.

CAST provides general purpose IP (gpIP), a broad range of popular and standards-based cores that includes processors, interfaces, and application-specific functions for multimedia and encryption. Designers use these cores so they can concentrate on the more unique, creative aspects of their system designs, or to quickly incorporate technology beyond their normal expertise. Privately owned and operating since 1993 with a focus on making IP practical and affordable, the company has established a reputation for high-quality products, simple licensing, and responsive technical support. CAST is located near New York City, and works with an international network of IP developers and distributors.

 

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