H264-LD-BP Core — Intel Implementation Results

The H264-LD-BP BP can be mapped to any Intel Family (provided sufficient silicon resources are available) and optimized to suit the particular project’s requirements. The following table provides sample resource utilization data for different Intel Device Families. Please contact CAST to get characterization data for your target configuration and technology.

  Area

Memory

Bits

DSPs / MULs

StratixV
4k ALMs
59,278
2
Arria10
4k ALMs
59,278
2
CycloneV
4k ALMs
59,278
2
Max10
10K LEs
59,364
2

Multiple H264-LD-BP cores can be combined to decode streams produced by the H264-E-BPF core. The following table indicates the number of H264-LD-BP cores that would be required for different video formats in different Intel families.

  480p30

720p30

720p60

1080p30

1080p60

StratixV

included(1)
included(1)
included(2)
included(2)

included(3)

Arria10

included(1)
included(1)
included(2)
included(2)
included(3)
CycloneV

included(1)
included(2)
included(3)
included(3)
not supported
Max10

included(1)
not supported
not supported
not supported

not supported

Note: List of video formats is not exhaustive.

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