H264-E-BPS Core — Intel Implementation Results

The H264-E-BPS can be mapped to any Intel Family (provided sufficient silicon resources are available) and optimized to suit the particular project’s requirements. The following table provides sample implementation data for the core configured under its default configuration (H264-EBPS) and for the intra-only version for the core (H264-EBIS). Please contact CAST to get characterization data for your target configuration and technology.

H264-E-BPS Area

Memory

Bits

DSPs /

MULs

Video

Formats
StratixV
8.6K ALMs
114k
9

1080p30/25

720p60/50/30
Arria10
8.6K ALMs
114k
9
Max10
21k LEs
112k
13

720p25

480p60

* List of video formats is not exhaustive. Indicated video formats may not be supported at devices of all speed grades

H264-E-BIS Area

Memory

Bits

DSPs

Video

Formats
StratixV
5k ALMs
58K
4

1080p30/25

720p60/50/30
Arria10
5k ALMs
58K
4
Max10
11K Les
58K
8

480p60

* List of video formats is not exhaustive. Indicated video formats may not be supported at devices of all speed grades

close window