H16750S Core — XILINX FPGA Results

The H16750S can be mapped to any ASIC technology or FPGA device (provided sufficient silicon resources are available).The following are sample Xilinx results optimized for area, without IrDA and assuming all core I/Os are routed off-chip. Please contact CAST to get characterization data for your target configuration and technology.

Family Device LUTs BRAMs / DSPs Fmax (MHz)
Artix-7 xc7a200t-3 605 0 / 0 339
Kintex-7 xc7a200t-3 604 0 / 0 525
Virtex-7 xc7vx330t-3 605 0 / 0 519
Kintex UltraScale xcku035-3 554 0 / 0 666
Virtex UltraScale xcvu095-3 556 0 / 0 700

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