H16550S Core — Lattice Implementation Results

The H16550S can be mapped to any ASIC technology or FPGA device (provided sufficient silicon resources are available). The following table provides sample performance and resource utilization data. Please contact CAST to get characterization data for your target configuration and technology.

Lattice Devices LUT-4s Slices PFUs Block RAMs External I/Os Speed
(fmax, MHz)
LFE2-50-7 688 451 272 2 39 156
LFXP2-17E-7 587 442 267 2 39 82

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