SCVL-S Overview
Synthesizable Standard Parts Library
The SCVL-S library contains synthesizeable VHDL models for most of the
components of the SCVL, the Standard Component VHDL Library. The library
is available in different versions, each using a VHDL coding style that's
optimum for a particular synthesis tool. (For simulation models, see SCVL.)
SCVL-S includes the types of function types shown
below. Please contact CAST or your
local distributor for more details.
Adders
and ALUs
- Binary
Full Adders
- Dual
Carry-Save Full Adders
- Look-Achead
Carry Generators
- Arithmetic
Logic Unit/Function Generators
Comparators
- Address
- Identity
- Magnitude
Counters
- 50Mhz
- BCD
- Binary
(Asynchronous and Synchronous)
- Decade
(Asynchronous and Synchronous)
|
Drivers
and Tranceivers
- Bus
Drivers
- Bus
Interface
- Bus
Transceivers
- Tridirectional
Bus Transceivers
- Universal
Transceiver Port Controllers
Encoders,
Decoders, Multiplexers, Selectors
- BCD
to Decimal Decoder/Driver
- BCD
To Seven-Segment Decoder/Drivers
- Binary
(Octal) Priority Encoder
- Data
Generators/Multiplexers
- Data
Selector/Storage Register
- Data
Selectors/Multiplexers
- Decimal
to BCD Priority Encoder
- Decoder/Demultiplexer
- Binary
Multiplexers
- Gray-to-Decimal
Decoder
|
Flip-Flops
- D-Type
Flip-Flops
- D-Type
Register
- D-type
Edge-Triggered
- J-K
Master-Slave
- R-S
Master-Slave
Latches
- Addressable
- Bistable
- S-R
- Transparent
Registers
- Cascadable
Priority
- Cascadable
Shift
- Shift
Register
- Bidirectional
Shift Register
- Register
File
- Storage
- Universal
Shift Registers/Latches
- Universal
Shift/Storage Registers
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