Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Protected Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs.
• See the video and image compression Family Page

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • Intel Accelerator
    • Xiinx PCIe Board

Companion Cores
CAMFE Camera Processor
Network Stacks
40G UDPIP Stack
1G/10G UDPIP Stack
RTP Stack for H.264
RTP Stack for JPEG
• MPEG Transport Stream
  Encapsulator

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

NOR Flash Controllers
Parallel Flash for AHB
SPI Flash
Octal, XIP for AHB
Quad, XIP for AHB
Quad, XIP for AXI

Legacy Peripherals
DMA Controllers
8237, 82380
UARTs
16450S, 16550S, 16750S
Timer/Counter
8254

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

Ethernet MAC
• 1G eMAC Controller

Network Stacks
40G UDPIP Stack
1G/10G UDP/IP stack
• Hardware RTP Stack
  – for H.264
  – for JPEG
• MPEG Transport Stream
  Encapsulator

Automotive Buses
CAN

CAN 2.0/FD controller
CAN FD Reference Design
CAN PHY Daughter Card
CAN Bus VIP
LIN
LIN Bus Master/Slave
SENT/SAE J2716
Tx/Rx Controller
Automotive Ethernet
IEEE 802.1AS Hardware
   Protocol Stack

Avionics/DO-254 Buses
MIL-STD 1553
ARINC 429
ARINC 825 CAN

SPI
Octal SPI
XIP for AHB
Quad SPI
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
Master/Slave VIP
I2C
Master  • Slave

Data Link Controllers
• SDLC & HDLC
UARTs
16450S, 16550S, 16750S

PCI — Target
32-bit, 32-bit multi, 64-bit
PCI — Master
32-bit, 32-bit multi, 64-bit
PCI — Host Bridge
32 bit, 32 bit - AHB
32 bit & device - AHB

These encryption cores make it easy to build security into a variety of systems.

AES
AES, programmable
  CCM, GCM, XTS
Key Expander

DES
DES single
DES triple

Hash Functions
SHA-3 (Keccak)
SHA-256
SHA-1
MD5

High Performance 32-bit CPU

  • 2.93 CoreMarks/MHz
  • Single-cycle execution on most instructions
  • Fast interrupt response
  • Optional hardware multiply, divide, multiply-accumulate, DSP instructions acceleration, and floating point units.

Low Power Consumption

  • Industry-leading code density minimizes instruction memory area & power
  • Small silicon footprint (from 11,000 sq. um in 28 nm technology, or 15K eq. gates) consumes less leakage energy

Flexible Memory Access

  • Tightly-coupled Quick Memory for fast and deterministic code and/or data access
  • Instruction and/or data memories can also be connected to the AHB, AXI4 or Wishbone bus
  • Optional Memory Protection Unit

Efficient Power Management

  • Dynamic clock gating and power shut-off of unused units
  • Software- and hardware-controlled clock frequency
  • Wake-up on tick timer or external interrupt

Advanced Debug Capability

  • Non-intrusive debug/trace for both CPU and system
  • Complex chained watchpoint and breakpoint conditions
  • Standard JTAG and proprietary Two-Wire Debug interfaces

Integrated Peripherals

  • Base configuration includes a 32 bit-wide tick timer and a programmable interrupt controller
  • Optionally pre-integrated with AMBA bus infrastructure, Vectored interrupt controller, DMAs, GPIOs, UARTS, Timers, SPI, I2C, memory controller and other IP cores from CAST

Easy Software Development

  • Eclipse IDE for Windows, Linux
  • ANSI C/C++ compiler, debugger, linker, assembler, & utilities
  • Architectural simulator
  • Ported libraries & RTOS

Contact Sales
Call or click.
+1 201.391.8300

Downloads

Related Products

The BA2™ Processor Family includes a set of royalty-free, pre-configured products intended for different applications:

Compare
Versions

  • BA20 PipelineZero™ 32-bit Embedded Processor, an ultra-low-power processor using zero pipeline stages for instruction execution to provide maximum energy and performance efficiency.

  • BA21 32-bit Low-Power Deeply Embedded Processor, a dual-pipeline low-power processor that delivers better performance than most processors its size.

  • BA22-CE 32-bit Cache-Enabled Embedded Processor, a 4- or 5-stage pipelined processor, with instruction and data caches.

  • BA22-AP Basic Application Processor, a 5-stage pipelined, cache, and MMU-enabled processor.

  • BA25 Advanced Application Processor, a 7/12-stage pipelined, out of order, cache- and MMU-enabled processor.

IP Subsystems

CAST offers a family of pre-integrated subsystems combining AMBA bus infrastructure with typical peripheral, interface, and memory controller IP cores and all essential drivers and software. The following IP subsystems can be used to deploy applications using a BA22-AP processor:

Download our Controllers & Processors IP Overview (PDF).

Beyond Debug Key photoGet full diagnostics while developing embedded software for BA2x processors with the JTAG Beyond Debug Key.

Try It Yourself

Try the BA22-DE 32-bit MCU IP core from CAST with the Talos Eval Kit

Evaluate the BA22's features and performance in your own environment with the Talos Series Evaluation Kit.

Webinar

webinar

This popular December 2012 webinar discussed looking beyond published CPU efficiency stats in choosing a processor core for a low-power system.
See the webinar recording:
CPU Subsystem Total Power Consumption: Understanding the Factors and Selecting the Best IP

News Releases

Articles

CAST: feeling the DesignCon vibe
EDACafe, Peggy Aycinena, 1/30/2013

DesignCon 2013 Yields IP, RF, DoE, and Mind Surprises
IP Insider, John Blyler, 2/1/2013

CAST announces royalty-free BA22 32-bit RISC IP
EDN Network, Ron Wilson, 8/3/2011

Blog Posts

See more ba2x blog posts >>>

Customer Experiences

BA22 processor user inSilica

"We went from licensing the BA22 processor [to] tape-out in just 5 months," said Ram Rangarajan, VP of Imaging Products at inSilica. "... Despite our stringent requirements, integration and software development was straightforward. "
inSilica Announces Tape-Out of Its Next Generation Camera Processor With BA22 Embedded RISC processor, Dec. 10, 2009

BA22-DE 32-bit Deeply Embedded Processor

The BA22-DE is a compact yet powerful 32-bit processor for deeply embedded applications. It is a Harvard-style processor able to run at relatively high clock frequencies (more than 800MHz in 28nm), with a surprisingly small silicon footprint (base version is just 15K gates). Highly configurable to allow a variety of size/performance trade-offs, the BA22-DE can be used as a microcontroller in numerous applications, including mixed signal processing, portable and wireless devices, and automotive systems.

BA22-DE Block Diagram

The BA22-DE uses separate instruction and data buses, and it has a pipeline depth of 4 or 5 stages depending on its configuration. The processor connects to the system via AMBA® AHB™, AXI4™, or Wishbone interfaces. It is also equipped with dedicated Quick Memory (QMEM) interfaces to tightly-coupled memories, which offer fast and deterministic access to code and data, and can be used for inter-core communication in a multi-core architecture. Its base version includes 16 to 32 general-purpose registers (GPRs), a tick-timer (TTimer), a programmable interrupt controller (PIC), an advanced power management unit (PMU), and optionally a debug unit (DBGU). The core’s processing capabilities can be enhanced further with the optional hardware multiplier (MUL), divider (DIV), Multiply-Accumulate (MAC), IEEE 754 compliant floating-point, and DSP instructions acceleration units. Its interrupt response time can also be optimized with the addition of a Vectored Interrupt controller (VIC).

The BA22-DE supports the variable instruction length BA2 instruction set, benefits from its extreme code density, and is binary compatible with other members of the BA2x processor family. Programming is facilitated with the included C/C++ tool chain, Eclipse IDE, architectural simulator, and ported C libraries. Advanced debugging capabilities and off-the-shelf development boards can further ease software development.

Additional microcontroller peripherals may be ordered for pre-integration and delivery with the core, individually or in a complete platform. IP Integration Services are also available to help integrate any BA22 processor configuration with memory controllers, image compression, or other CAST IP cores.

Part of the royalty-free BA2x family, the BA22-DE processor core has been designed for easy reuse and integration, has been rigorously verified, and is production proven.

BA22-DE reference designs have been evaluated in a variety of technologies. See representative implementation results (in a new pop-up window):

ASIC numbersAltera numbersXilinx numbers

The BA2 Instruction Set

The BA2 instruction set provides extreme code density without compromising performance, ease of use, or scalability. It features:

Software Development

The core is delivered with BeyondStudio™, a complete Integrated Development Environment (IDE) for Windows and Linux under Eclipse. BeyondStudio includes a highly featured source code editor, supports graphical source-level debugging and GUI based configuration, and can be extended with a collection of available or custom plug-ins.

The IDE integrates an Instruction level simulator and a GNU cross-compiling tool-chain. The GNU Compiler Collection (GCC), includes front ends for C, C++, Objective-C, Fortran, Java, and Ada; libraries for these languages (e.g. libstdc++, libgcj, etc) are provided. The tool chain also includes the GNU Binutils collection of binary tools, and the GNU Project Debugger (GDB).

Extensive support of libraries enables easy application development for Linux and Android. Finally, hardware targets can be interfaced with the cost effective Beyond Debug Key, which in addition to standard JTAG (IEEE 1149.1 and IEEE 1149.7) also supports proprietary One Wire Debug and Two Wire Debug protocols.

Support and Services

The core as delivered is warranted against defects for 90 days from purchase. Thirty days of phone and email technical support are included, starting with the first interaction. Additional maintenance and support options are available.

IP Integration Services are also available to help minimize time to market for BA22-based systems. The processor core can be delivered pre-integrated with bus infrastructure cores, typical microcontroller peripherals, memory controllers, and interconnect IP cores. Contact CAST Sales for details.

Deliverables

The core is available for ASICs in synthesizable Verilog source code or for FPGAs in optimized netlists. It includes everything required for successful implementation: extensive documentation, a testbench, a sample SoC design, sample synthesis and simulation scripts, and the BeyondStudio™ Eclipse-based software development IDE for Windows and Linux.

Reference designs on FPGA boards are also available; contact CAST Sales for information.

Comparing BA2x Family Processor Cores

Features

BA20
PipelineZero
Embedded
BA21
Low-Power
Deeply Embedded

BA22-DE
Deeply
Embedded

BA22-CE
Cache-Enabled

BA22-AP
Basic Application
Processor

BA25
Application
Processor

CoreMarks/MHz1 3.48 2.77 2.93 2.93 2.93 2.51
Fmax @ TSMC 28nm HPM2 350 MHz 400 MHz 900 MHz 800 MHz 800 MHz > 1,000 MHz
Area @ TSMC 28nm HPM2, 3

From 8k Gates or

0.006 sq.mm

From 10k

0.007 sq.mm

From 15k or

0.011 sq.mm

From 30k or

0.022 sq.mm

From 55k or

0.038 sq.mm

200k or

0.145 sq.mm

BA2 Variable Length ISA

included

included

included

included

included

included

Pipeline Stages

1

2

4/5

5

5

7/12

Out of Order Completion

not supported

not supported

not supported

not supported

not supported

included

Branch Prediction Unit

not supported

not supported

not supported

optional

optional

included

Memory Protection Unit

optional

optional

optional

optional

optional

not supported

Number of GPRs

12-32

12-32

16-32

16-32

32

32

SoC Data Bus

AXI4

AXI4/AHB

AHB/WB/AXI4

AHB/WB/AXI4

AHB/WB/AXI4

AXI4

SoC Instruction Bus

AXI4

AXI4/AHB

AHB/WB/AXI4

AHB/WB/AXI4

AHB/WB/AXI4

AXI4

Hardware Multiplier

optional

optional

optional

included

included

included

Hardware Divider optional optional optional optional optional optional

Multiply-Accumulate Unit

optional

optional

optional

optional

optional

optional

Floating Point Unit

optional

optional

optional

optional

optional

optional

Saturated Arithmetic Instructions included included included included included included

DSP Extensions Acceleration

optional

optional

optional

optional

optional

optional

JTAG Debug

included

included

included

included

included

included

Two Wire Debug optional optional optional optional optional optional

Embedded Tick Timer, PIC, and PMU

included

included

included

included

included

included

Vectored Interrupt Controller

optional

optional

optional

optional

optional

optional

Tightly Coupled I/D Busses

included

included

included

optional

optional

optional

Instr. & Data Caches

not supported

not supported

not supported

included(L0)

included(L0)

included(L0/L1)

Instr. & Data MMU

not supported

not supported

not supported

not supported

included(L0)

included(L0/L1)

Configurable Peripherals Platform

optional

optional

optional

optional

optional

optional

Beyond Studio SW IDE and GCC SDK

included

included

included

included

included

included

included= Supported   optional= Optional   not supported= Not Supported

Notes:

1) CoreMarks score depends on core configuration. Please consult CAST to get the benchmark score for the configuration of your choice.
2) Value depends on core configuration, synthesis tool & settings, and libraries. Please contact cast to get accurate characterization data for the configuration, libraries, synthesis tool & settings of your choice.
3) Area figures for BA22-CE, BA22-AP and BA25 exclude the area of SRAMs required for the implementation of caches and/or MMUs.

 

 

 

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