Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Protected Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs.
• See the video and image compression Family Page

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

NOR Flash Controllers
Parallel Flash for AHB
SPI Flash
Octal, XIP for AHB
Quad, XIP for AHB
Quad, XIP for AXI

Legacy Peripherals
DMA Controllers
8237, 82380
UARTs
16450S, 16550S, 16750S
Timer/Counter
8254

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

Ethernet MAC
• 1G eMAC Controller

Network Stacks
40G UDPIP Stack
1G/10G UDP/IP stack
• Hardware RTP Stack
  – for H.264
  – for JPEG
• MPEG Transport Stream
  Encapsulator

Automotive Buses
CAN

CAN 2.0/FD controller
CAN FD Reference Design
CAN PHY Daughter Card
CAN Bus VIP
LIN
LIN Bus Master/Slave
SENT/SAE J2716
Tx/Rx Controller
Automotive Ethernet
IEEE 802.1AS Hardware
   Protocol Stack

Avionics/DO-254 Buses
MIL-STD 1553
ARINC 429
ARINC 825 CAN

SPI
Octal SPI
XIP for AHB
Quad SPI
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
Master/Slave VIP
I2C
Master  • Slave

Data Link Controllers
• SDLC & HDLC
UARTs
16450S, 16550S, 16750S

PCI — Target
32-bit, 32-bit multi, 64-bit
PCI — Master
32-bit, 32-bit multi, 64-bit
PCI — Host Bridge
32 bit, 32 bit - AHB
32 bit & device - AHB

These encryption cores make it easy to build security into a variety of systems.

AES
AES, programmable
  CCM, GCM
Key Expander

DES
DES single
DES triple

Hash Functions
SHA-3 (Keccak)
SHA-256
SHA-1
MD5

Low Power 32-bit Processor

  • Small silicon footprint (less than 10k gates) for lower leakage and dynamic CPU power
  • Two-stage pipeline architecture
  • BA2TM Extreme Code Density for lower instruction fetching energy
  • Advanced power management
    • Dynamic clock gating and power shut-off of unused units
    • Software- and hardware-controlled clock frequency
    • Wake-up on tick timer or external interrupt

Processing Efficiency

  • 2.77 Coremarks/MHz
  • From 150 MHz (TSMC 65nm LP)

Optional Processor Units

  • Programmable Vectored Interrupt Controller Unit
  • Memory Protection Unit
  • Timer Unit
  • Debug Unit
    • MDB support
    • Trace port support
  • ROM patching Unit
  • Floating Point Unit
  • Hardware Multiplier/Divider

Available Pre-Integrated Platforms

  • Microcontroller peripherals such as GPIO, UART, Real-Time Clock, Timers, I2C, and SPI
  • Memory controllers, interconnect IP, and more
  • Reference Design Board for evaluation or rapid development start

Easy Software Development

  • Non-intrusive JTAG debug/trace for both CPU and system
  • Complex chained watchpoint and breakpoint conditions
  • BeyondStudio™ complete IDE for Windows or Linux under Eclipse
  • Ported libraries and operating systems

Contact Sales
Call or click.
+1 201.391.8300

Downloads

Options

Additional peripherals may be added before delivery of the core.

A hardware reference design board is available.

CAST Integration Services are available to help integrate this core with other CAST IP cores.

Related Products

The BA22 Processor Family includes a set of royalty-free, pre-configured products intended for different applications:

Platforms

  • BA2x-AXI-PP pre-integrated peripherals platform for the AMBA3 AXI bus.
  • BA2x-AHB-PP pre-integrated peripherals platform for the AMBA2 AHB/APB buses.

Download our Controllers & Processors IP Overview (PDF).

Beyond Debug Key photoGet full diagnostics while developing embedded software for BA2x processors with the JTAG Beyond Debug Key.

News Releases

Blog Posts

See more ba2x blog posts >>>

BA21 32-bit Low-Power Deeply Embedded Processor

Implements a 32-bit low-power processor that delivers better performance than most processors of its size.  Designed for deeply-embedded systems or as an auxiliary processor in larger systems, it is an especially effective choice for wireless communication, analog peripherals management, or other mixed-signal functions in energy-and cost-sensitive applications. 

This royalty-free 32-bit processor core is binary-compatible with other members of the silicon-proven BA2x processor family. Its BA2 instruction set is relatively simple and extremely compact, offering system area and energy savings benefits. Programing is facilitated with the included C/C++ tool chain, Eclipse IDE, architectural simulator, and ported C libraries, RTOSs, and OSs.

Processor Description

The two-stage pipelined architecture minimizes standby/idle power and run-time energy consumption. The small silicon footprint of the CPU, and the smaller code-memory requirement (resulting from extreme code density of the BA2 instruction set), are critical for minimizing leakage currents during idle or standby modes and reducing dynamic power consumption. Furthermore, the processor allows for sophisticated power management, enabling dynamic clock-gating or power-shut-off of unused units, and software or hardware controller dynamic frequency scaling of the bus and the CPU.

BA21 Block Diagram

Delivering more processing power per MHz than most processors in its class, the BA21 can be configured to operate at low frequencies to further save power, or to meet the most demanding embedded processing requirements, or any optimum combination of both. Its processing capabilities can be enhanced further with a hardware multiplier/divider unit and an IEEE 754 compliant floating-point unit. Timely responses to interrupts are facilitated by a vectored interrupt controller, and an optional memory protection unit can be used to protect application code and/or data from corruption. The core supports reach debug capabilities including trace.

The system interface uses two AMBA® AXI4 buses, one for data and one for instructions, both of configurable data width. Two tightly-coupled quick memory (QMEM) buses allow fast access for time-critical code and data, and can be used for inter-core communication in a multi-core architecture.

Additional microcontroller peripherals may be ordered for pre-integration and delivery with the core, individually or in a complete platform. IP Integration Services are also available to help integrate any BA2x processor configuration with memory controllers, image compression, or other CAST IP cores.

Applications

The royalty-free, energy-efficient BA21 processor can be employed as a replacement for existing 8-bit and 16-bit processor market, or used as secondary, housekeeping or peripheral controller processor in complex SoC designs, and it suitable for a wide-range of deeply embedded applications such as:

The BA2 Instruction Set

The BA2 instruction set provides extreme code density without compromises on performance, ease of use, or scalability. It features:

Customizable Platforms

The BA21 processor can be delivered pre-integrated with typical microcontroller peripherals such us UARTs, timers and serial communication cores, or with memory controllers and interconnect IP cores. Contact CAST Sales for details.

Support and Services

The core as delivered is warranted against defects for 90 days from purchase. Thirty days of phone and email technical support are included, starting with the first interaction. Additional maintenance and support options are available.

IP Integration Services are also available to help minimize time to market for BA22-based systems.

Deliverables

The core is available for ASICs in synthesizable Verilog source code, and includes everything required for successful implementation. The core is delivered with software development tools Windows and Linux, with an Eclipse IDE interface.

Comparing BA2x Family Processor Cores

Features

BA20
PipelineZero
Embedded
BA21
Low-Power
Deeply Embedded

BA22-DE
Deeply
Embedded

BA22-CE
Cache-Enabled
Embedded

BA22-AP
Basic Application
Processor

BA25
Application
Processor

BA2 Variable Length ISA

included

included

included

included

included

included

Pipeline Stages

1

2

4/5

5

5

71 / 12

Out of Order Completion

optional

optional

not supported

not supported

not supported

included

Branch Prediction Unit

not supported

not supported

optional

optional2

optional2

included

Memory Protection Unit

optional3

optional

optional2

optional2

not supported

not supported

Number of GPRs

12-32

12-32

16/32

16/32

32

32

SoC Data Bus

EMEM/AXI4 Lite

EMEM/AXI4 Lite

AHB/WB/AXI42

AHB/WB/AXI42

AHB/WB/AXI42

AXI4

SoC Instruction Bus

EMEM/AXI4 Lite

EMEM/AXI4 Lite

AHB/WB/AXI42

AHB/WB/AXI42

AHB/WB/AXI42

AXI4

Hardware Multiplier and/or Divider

optional

optional

optional

included

included

included

Multiply-Accumulate Unit

optional2

optional2

optional

optional

optional

optional

Floating Point Unit

optional2

optional2

optional

optional

optional

optional

DSP Extensions Acceleration

not supported

optional2

optional

optional

optional

optional

JTAG Debug Support

optional

optional

optional

optional

optional

optional

Embedded Tick Timer, PIC, and PMU

optional

optional

optional

included

included

included

Vectored Interrupt Controller

optional

optional

optional

optional

optional

optional

Tightly Coupled I/D Busses

included

included

included

optional

optional

optional

Instr. & Data Caches

not supported

not supported

not supported

included(L0)

included(L0)

included(L0/L1)

Instr. & Data MMU

not supported

not supported

not supported

not supported

included(L0)

included(L0/L1)

Configurable Peripherals Platform

optional

optional

optional

optional

optional

optional

Beyond Studio SW IDE and GCC SDK

included

included

included

included

included

included

DMIPS/MHz

1.52/1.99/3.044

1.49/2.335

1.76/2.535

1.76/2.536

1.76/2.536

1.51

CoreMarks/MHz

3.41

2.77

2.93

2.936

2.936

2.51

FMAX @ TSMC65LP

75 MHz

150 MHz

400 MHz

400 MHz

400 MHz

800 MHz

Eq. Gates5

From 10k

From 10k

From 15k

From 25k

From 35k

From 150k

Availability

Now

Now

Now

Now

Now

Now

Royalty Free Licensing

optional

optional

optional

optional

optional

optional

included= Supported   optional= Optional   not supported= Not Supported

Notes:

1) Minimum for simple ALU instructions.
2) Feature can be made available up on request.
3) Work in progress.
4) DMIPS rating using GCC v4.9.1 and ground rules/optimizations/link-time optimizations
3) DMIPS rating using GCC v4.9.1 and optimizations, link-time optimizations.
4) DMIPS rating for code running from tightly-coupled memories.

 

 

 

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