Features

BA20
PipelineZero
Embedded
BA21
Low-Power
Deeply Embedded

BA22-DE
Deeply
Embedded

BA22-CE
Cache-Enabled

BA22-AP
Basic Application
Processor

BA25
Application
Processor

CoreMarks/MHz1 3.48 2.77 2.93 2.93 2.93 2.51
Fmax @ TSMC 28nm HPM2 350 MHz 400 MHz 900 MHz 800 MHz 800 MHz > 1,000 MHz
Area @ TSMC 28nm HPM2, 3

From 8k Gates or

0.006 sq.mm

From 10k

0.007 sq.mm

From 15k or

0.011 sq.mm

From 30k or

0.022 sq.mm

From 55k or

0.038 sq.mm

200k or

0.145 sq.mm

BA2 Variable Length ISA

included

included

included

included

included

included

Pipeline Stages

1

2

4/5

5

5

7/12

Out of Order Completion

not supported

not supported

not supported

not supported

not supported

included

Branch Prediction Unit

not supported

not supported

not supported

optional

optional

included

Memory Protection Unit

optional

optional

optional

optional

optional

not supported

Number of GPRs

12-32

12-32

16-32

16-32

32

32

SoC Data Bus

AXI4

AXI4/AHB

AHB/WB/AXI4

AHB/WB/AXI4

AHB/WB/AXI4

AXI4

SoC Instruction Bus

AXI4

AXI4/AHB

AHB/WB/AXI4

AHB/WB/AXI4

AHB/WB/AXI4

AXI4

Hardware Multiplier

optional

optional

optional

included

included

included

Hardware Divider optional optional optional optional optional optional

Multiply-Accumulate Unit

optional

optional

optional

optional

optional

optional

Floating Point Unit

optional

optional

optional

optional

optional

optional

Saturated Arithmetic Instructions included included included included included included

DSP Extensions Acceleration

optional

optional

optional

optional

optional

optional

JTAG Debug

included

included

included

included

included

included

Two Wire Debug optional optional optional optional optional optional

Embedded Tick Timer, PIC, and PMU

included

included

included

included

included

included

Vectored Interrupt Controller

optional

optional

optional

optional

optional

optional

Tightly Coupled I/D Busses

included

included

included

optional

optional

optional

Instr. & Data Caches

not supported

not supported

not supported

included(L0)

included(L0)

included(L0/L1)

Instr. & Data MMU

not supported

not supported

not supported

not supported

included(L0)

included(L0/L1)

Configurable Peripherals Platform

optional

optional

optional

optional

optional

optional

Beyond Studio SW IDE and GCC SDK

included

included

included

included

included

included

included= Supported   optional= Optional   not supported= Not Supported

Notes:

1) CoreMarks score depends on core configuration. Please consult CAST to get the benchmark score for the configuration of your choice.
2) Value depends on core configuration, synthesis tool & settings, and libraries. Please contact cast to get accurate characterization data for the configuration, libraries, synthesis tool & settings of your choice.
3) Area figures for BA22-CE, BA22-AP and BA25 exclude the area of SRAMs required for the implementation of caches and/or MMUs.