The following are sample Xilinx results with the pixel clock fixed at 27 MHz. Results for Virtex 4 and Virtex-II Pro use a 512x32-bit dual-port RAM block, and those for Spartan 3 and Spartan 2 use a FIFO with 32-bit-wise data, depth – 9.
| Xilinx Devices | Area | Speed |
| Virtex 4 XC4VLX15-12 |
1214 SLICEs 1 RAMBs |
112 MHz |
| Virtex-II Pro XC2VP2-7 |
1216 SLICEs 1 RAMBs |
86 MHz |
| Spartan 3 XC3S400-5 |
1223 SLICEs 1 BRAM |
71 MHz |
| Spartan 2 XC2S100-6 |
1198 SLICEs 4 BRAM |
60 MHz |