CAST IDCT Core — Altera Implementation Results

The following are sample Altera results obtained after area optimization during synthesis and place and route, while assuming that all megafunction I/Os are routed off-chip.

Altera Devices Logic Frequency Special Features
Apex 20KE
EP20K100E-1
3,069 LEs 68 MHz 3 ESB
Apex-II
EP2A15-C7
3,068 LEs 92 MHz 3 ESB
Cyclone
EP1C6-C6
3,009 LEs 96 MHz 1 M4K
Stratix
EP1S10-C5
1,481 LEs 141 MHz 1 M4K
16 DSP blocks 9 bit
Cyclone-II
EP2C5-C6
1,379 LEs 150 MHz 1 M4K
16 DSP blocks 9 bit
Stratix-II
EP2S15-C3
1,031 ALUTs 202 MHz 1 M4K
16 DSP blocks 9 bit

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