The following are indicative Altera implementation results, for which all internal FIFOs are implemented with available SRAM resources.
Altera Devices |
Logic |
Fmax (MHz) |
Special Features |
Cyclone-III |
2,580 LEs | 118 / 54 | 4 M9Ks |
| Stratix-III EP3SE50-C2 |
1,641 ALUTs | 167 / 91 | 4 M9Ks |
| Stratix-IV EP4SGX230-C3ES |
1,653 ALUTs | 170 / 82 | 4 M9Ks |
| Arria II GX EP2AGX20–C4 |
1,653 ALUTs | 186 / 69 | 4 M9Ks |