The following are sample Altera results for a full-featured controller supporting two chip selects, obtained after speed optimization during synthesis and place and route, while assuming that all megafunction I/Os are routed off-chip.
Altera Devices |
Logic |
Other |
Frequency |
Quartus |
Cyclone |
1196 LEs | 1 PLL | > 190 MHz | v6.0 |
| Cyclone-II (EP2C8-6) |
1218 LEs | 1 PLL | > 190 MHz | v6.0 |
| Stratix (EP1S10-5) |
1236 LEs | 1 PLL | > 190 MHz | v6.0 |
| Stratix-II (EP2S15-3) |
1057 ALUT | 1 PLL | > 200 MHz | v6.0 |
Stratix-II |
7858 HCells | 1 PLL | > 200 MHz | v6.0 |