Results with the core configured for a 16-bit data path and 2 FIFOs (RX/TX) of 64x18 bits.
| Xilinx Device | Slices |
BRAM | I/Os | Speed (fmax, MHz) |
ISE Version |
| Spartan-3 XC3S50-5 |
351 | 2 | 66 | 120 | 10.1i |
| Spartan-3E XC3S100E-5 |
314 | 2 | 66 | 133 | 10.1i |
| Virtex-II XC2V40-6 |
291 | 2 | 66 | 175 | 10.1i |
| Virtex-II Pro XC2VP2-7 |
292 | 2 | 66 | 200 | 10.1i |
| Virtex-4 XC4VLX15-12 |
295 | 2 | 66 | 210 | 10.1i |
| Virtex-5 XC5VLX30-3 |
137 | 1 | 66 | 220 | 10.1i |