Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Embedded Processors
BA22 Real-Time Embedded
BA22 Deeply Embedded
BA21 Low Power

Peripheral Platforms
& AMBA Infrastructure

BA2x AHB Platform
BA2x AXI Platform

 

GPUs & Peripherals
See Graphics &
  Peripherals Cores >

These video and image compression cores and subsystems help you handle video compression for demanding, high-quality applications or choose the best type of image compression for your specific system.

JPEG 2000
Encoder
J2K Platform

Lossless Compression
LJPEG Encoder
LJPEG Decoder
JPEG-LS Encoder

Complement or replace system processors with GPUs and easily integrate memories, peripherals, and hardware networking stacks into SoCs.

NOR Flash Controllers
Serial/SPI NOR Flash
Parallel NOR Flash

Device Controllers
smart card reader

Legacy Peripherals
DMA Controllers
8237, 82380
UARTs
16450S, 16550S, 16750S
Timer/Counter
8254

AMBA Infrastructure
AMBA Infrastructure Cores
AHB 32-bit DMA


Interconnect Peripherals

See Interconnect Cores >

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

DisplayPort
Transmitter
•  Receiver

Ethernet MAC
•  1G eMAC Controller

Network Stacks
1G/10G UDP/IP stack
Hardware RTP Stack for H.264

PCI — Target
32-bit
32-bit multi
64-bit
PCI — Master
32-bit
32-bit multi
64-bit
PCI — Host Bridge
32 bit
32 bit - AHB
32 bit & device - AHB

PCI Express
Family Overview
x1/x4
x8
application interface


Data Link Controllers

• SDLC & HDLC

These encryption cores make it easy to build security into a variety of systems.

DES
DES single
DES triple

  • Fully compliant with the PCI Local Bus Specification, Revision 2.3.
  • 33 MHz performance (PCI clock frequency)
  • 32-bit datapath
  • Full Target functionality, with support for these commands:
    • Configuration Read, Configuration Write
    • Memory Read, Memory Write, Memory Read Multiple (MRM), Memory Read Line (MRL), Memory Write and Invalidate (MWI)
    • I/O Read, I/O Write
  • Zero wait states burst mode
  • Support all interrupt pins (INTA#, INTB#, INTC#, INTD#)
  • Type 0 Configuration space
  • Supports all Base Address Registers
  • Supports backend initiated target retry, disconnect and abort
  • Parity generation and parity error detection
  • Silicon-verified (XILINX Virtex FPGA)
  • PC300 prototyping board available for fast application prototyping

Contact Sales
Call or click.
+1 201.391.8300

PDF Datasheets

ASIC
Altera, Xilinx

Related Products

Compare
Versions

  • PCI-T32 32-bit, 33 MHz PCI Target Interface
  • PCI-T64 64-bit, 66 MHz PCI Target Interface
  • PCI-M32 32-bit, 33 MHz PCI Master/Target Interface
  • PCI-M32MF Multi-Function PCI Master/Target Interface
  • PCI-M64 64-bit, 66 MHz PCI Master/Target Interface
  • PCI-HB 32-bit/33,66Mhz PCI Host Bridge
  • PCI-DHB-AHB PCI - AMBA AHB Device/Host Bridge Core
  • PCI-HB-AHB PCI to AMBA AHB Host Bridge Core

Related Information

Validated for Mentor Graphics Presicision FPGA SynthesisValidated for Precision™ FPGA Synthesis

PCI IP Core PCI-T32MF 32-bit, 33 MHz Multifunction Target Interface Core

The PCI-T32MF implements a target-only PCI interface compliant with the PCI 2.3 specification. It supports a 32-bit address/data bus and operates up to 33 MHz (PCI clock).

The core offers one to eight independent PCI functions in a single chip, each implementing 64 to 256 bytes of PCI Configuration Space registers as required. Each function supports up to six Base Address Registers, with both I/O and Memory space decoding from 16 bytes up to 4GB.

The core was developed for easy reuse with ASICs or FPGAs.

See representative implementation results (each in a new pop-up window):

Altera numbers Xilinx numbers

Applications

Block Diagram

PCI-T32MF 32-bit, 33 MHz Multifunction Target Interface Block Diagram

Support

The core as delivered is warranted against defects for ninety days from purchase. Thirty days of phone and email technical support are included, starting with the first interaction. Additional maintenance and support options are available.

Verification

The core has been verified through extensive simulation and rigorous code coverage measurements.

Deliverables

The core is available in ASIC (synthesizable HDL) and FPGA (netlist) forms, and includes everything required for successful implementation: