Xilinx results with IOBs assuming all core I/Os are routed off-chip, and with single base address register configuration for slices.
| Supported Family | Slices | IOBs | BRAM | Fmax (MHz) |
ISE Version |
| Spartan-3E 3S250E-4 |
206 | 48 | 0 | 33 | 12.2i |
| Spartan-6 6SXL16-2 |
99 | 48 | 0 | 33 | 12.2i |
| Virtex-4 4VLX25-10 |
167 | 48 | 0 | 33 | 12.2i |
| Virtex-5 5VLX40-1 |
115 | 48 | 0 | 33 | 12.2i |