LIN Core — Microsemi Implementation Results

The LIN can be mapped to any ASIC technology or FPGA device (provided sufficient silicon resources are available). The following table provides sample performance and resource utilization data. Please contact CAST to get characterization data for your target configuration and technology.

Microsemi Device Configuration Cells RAM Blocks FMAX
(MHz)
Sequ (R) Comb (C)
ProASIC3
A3P1000-2
Master 209 773 - 4
ProASIC3
A3P1000-2
Slave 249 1066 - 4
ProASIC3
A3P1000-2
Slave w/ auto bit rate 269 1262 - 4
SmartFusion2
M2S150-STD
Master 209 DFF 488 4LUT - 4
SmartFusion2
M2S150-STD
Slave 288 DFF 755 4LUT - 4
Igloo2
M2GL150-STD
Master 209 DFF 488 4LUT - 4
Igloo2
M2GL150-STD
Slave 318 DFF 887 4LUT - 4

Note: 4 MHz is the required LIN speed.

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