The following are representative ASIC results for the core synthesized with a clock constraint of 400 MHz..
| ASIC Technology | Cell Area |
NAND2 Area |
Approx. Area (gate equiv.) |
Frequency (MHz) |
| TSMC .09 µm | 3,266 |
2.8224 |
838 |
671 |
| TSMC .13 µm | 6,336 |
5,0922 |
1,244 |
452 |
| TSMC .18 µm | 12,826 |
9.9792 |
1,285 |
429 |