CAST CAN-CTRL Core — XILINX FPGA Results

The following are sample results optimized for area with 3 receive buffers, 3 transmit buffers and 3 acceptance filters. IOBs assume all core I/Os are routed off-chip.

Xilinx
Supported Family
Slices BRAM IOBs Fmax
(MHz)
ISE
Version
Spartan-3E
XC3S1200E-5
1251
2
49
50
13.1i
Spartan-6
XC6SLX25-3
1326
2
49
76
13.1i
Virtex-5
XC5VLX30-3
368
2
49
104
13.1i
Virtex-6
XC6VLX130T-3
420
2
49
137
13.1i

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