CAN-CTRL Core — Lattice Implementation Results

The CAN-CTRL can be mapped to any Lattice Device (provided sufficient silicon resources are available) and optimized to suit the particular project’s requirements.. The following are sample results for the core configured with three receive buffers, three transmit buffers, and three acceptance filters (does not include TTCAN). Please contact CAST to get characterization data for your target configuration and technology.

Family &

Device

CAN-FD

Support
Logic Block RAMs Host Clock (MHz) CAN Clock (MHz)
ICE
40U/P5k
Yes

3,883 LCs

544 PLBs
6
42
25
ICE
40U/P5k
No

2,932 LCs

452 PLBs
6
45
25
MachXO2
7000HC
Yes

1,530 Slices

3,025 LUT4s
4
59
23
MachXO2
7000HC
No

1,248 Slices

2,466 LUT4s
0
62
29

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