1553-BC/RT/MT Core — XILINX FPGA Results

The 1553-BC/RT/MT can be mapped to any ASIC technology or FPGA device (provided sufficient silicon resources are available).  Silicon resources requirements depend on configuration. The following table provides indicative implementation results. Please contact CAST to get characterization data for your target configuration and technology.

Configuration Target Technology Area
BC-Only
Kintex7
6,900 LUTs, 3 DSPs, 0 BRAM
RT-Only
Kintex7
2,900 LUTs, 0 DSPS, 1 BRAM

 

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