The following are sample utilization metrics for supporting 24-bit/pixel color images, with up to 2048 pixels/line resolution, in Xilinx devices. Implementation figures are obtained after speed optimization during synthesis and place and route, while assuming that all core I/Os are routed off-chip.
| Xilinx Device | Slices |
Fmax (MHz) |
I/O | BRAM | Special Features |
ISE |
| Spartan-3 3S1000-5 |
3,917 | 66 | 89 | 20 RAMB16 | - | 12.2 |
| Spartan-6 6SLX16-3 |
2,191 | 95 | 89 | 20 RAMB16 | - | 12.2 |
| Virtex-5 5VLX30-3 |
1,610 | 125 | 89 | 7 RAMB36 3 RAMB18 |
- | 12.2 |
| Virtex-6 6VLX75T-3 |
2,202 | 190 | 89 | 7 RAMB36 6 RAMB18 |
- | 12.2 |