CAST JPEG-E-X Core — ASIC Implementation Results

ASIC results are sample pre-layout ASIC results (as reported by the synthesis tool and silicon vendor design kit under typical conditions), with all core I/Os assumed to be routed on-chip. Logic Area results exclude memory. Equivalent gates count uses the smallest NAND2 gate available in the technology.

ASIC Technology

Frequency

Logic Area

Number of Eq. Gates

Memory (bits)

UMC 0.18µ

250 MHz

819,428

82,113

23,680

TSMC 0.09µ

450 MHz

194,600

68,948

23,680

close window