Results are obtained after speed optimization during synthesis and place and route, while assuming that all core I/Os are routed off-chip.
| Xilinx Device |
Slices |
Fmax (MHz) |
I/O | BRAM | Special Features |
ISE |
| Spartan-3 3S1000-5 |
2,780 | 80 MHz | 61 | 6 RAMB16 | 9 MULT18 | 12.2 |
| Spartan-6 6SLX9-3 |
1,430 | 105 MHz | 61 | 1 RAMB16 4 RAMB8 |
9 DSP48 | 12.2 |
| Virtex-5 5VLX30-3 |
1,162 | 165 MHz | 61 | 4 RAMB18 | 9 DSP48 | 12.2 |
| Virtex-6 6VLX75T-3 |
1,467 | 210 MHz | 61 | 5 RAMB18 | 9 DSP48 | 12.2 |