Sample Lattice results are obtained after speed optimization during synthesis and place and route, while assuming that all core I/Os are routed off-chip.
| Lattice Devices | Slices | EBR | Other | I/Os | Fmax (MHz) |
| ECP2 LFE2-12E-7 |
2733 | 6 | 9 MULT18X18 | 61 | 115 |
| XP2 LFXP2-17E-7 |
2706 | 6 | 9 MULT18X18 | 61 | 95 |
| SC LFSC3GA15E-7 |
4029 | 6 | - | 61 | 155 |