CAST DES3 Core — Altera Implementation Results

Non Pipelined Area Optimized

Altera Device	LEs/ ALUTs	Memory	I/Os	Fmax (MHz)	Throughput (Mbps)	Quartus
Cyclone-II EP2C20-6	1062	-	326	87	116	7.2
Cyclone-III EP3C4-6	1062	-	326	118	157	7.2
Stratix-II EP2S15-3	517	-	326	169	225	7.2
Stratix-III EP3SL50-2	516	-	326	243	324	7.2

Non Pipelined Speed Optimized

Altera Device	LEs/ ALUTs	Memory	I/Os	Fmax (MHz)	Throughput (Mbps)	Quartus
Cyclone-II EP2C20-6	1623	-	326	130	173	7.2
Cyclone-III EP3C4-6	1624	-	326	149	198	7.2
Stratix-II EP2S15-3	711	-	326	205	273	7.2
Stratix-III EP3SL50-2	709	-	326	273	364	7.2

Pipelined Speed Optimized

Altera Device	LEs/ ALUTs	Memory	I/Os	Fmax (MHz)	Throughput (Gbps)	Quartus
Cyclone-II EP2C20-6	13871	-	326	142	9.08	7.2
Cyclone-III EP3C4-6	13735	-	326	204	13.05	7.2
Stratix-II EP2S15-3	5397	-	326	332	21.24	7.2
Stratix-III EP3SL50-2	5358	-	326	363	23.32	7.2