Sample results with slices optimized for area with IOBs assuming all core I/Os and clocks are routed off-chip.
| Xilinx Supported Family |
Slices | BRAM | GCLK | IOBs |
Fmax |
ISE |
| Spartan-3E 3S1200E-5 |
463 | - | 1 | 54 | 70 MHz | 12.2 |
| Spartan-6 6SLX25-3 |
182 | - | 1 | 54 | 77 MHz | 12.2 |
| Virtex-5 5VLX30-3 |
177 | - | 1 | 54 | 145 MHz | 12.2 |
| Virtex-6 6VLX130T-3 |
159 | - | 1 | 54 | 156 MHz | 12.2 |