ZipAccel-C Core — XILINX FPGA Results

ZipAccel-C reference designs have been evaluated in a variety of technologies. ZipAccel-C performance can scale by instantiating more search engines and/or Huffman decoders. Furthermore, other design options such as the search area window affect the silicon resources utilization.

The following are sample Xilinx results for a subset of the possible configuration options, and do not represent the smallest possible area requirements nor the highest possible clock frequency. Contact CAST Sales for help defining likely configuration options and estimating implementation results for your specific system.

Family / Device Configuration
LUts
RAM Blocks

Kintex-7

xc7k325-2
1 Search Engine, I Dynamic Huffman Encoder, 4KB History Window, 150MHz 14,549 52

Kintex-7

xc7k325-2
8 Search Engines, 2 Dynamic Huffman Encoders, 4KB History Window, 150MHz 86,172 411

Virtex-7

xc7v690-2
16 Search Engines, 4 Dynamic Huffman Encoders, 8KB History Window, 200MHz 207,375 1292

Virtex-7

xc7v1149-2
32 Search Engines, 8 Dynamic Huffman Encoders, 4KB History Window, 200MHz 380,892 1,512

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