Reference designs have been evaluated in a variety of technologies. The following are sample results using a 90nm ASIC technology, and separate optimizations for speed and area. The EASE debug option is not included.
| Version & Configuration | Maximum Speed | Minimum Area |
| R8051XC2 CPU |
450 MHz | 8.0k gates |
| R8051XC2–AF | 435 MHz | 12.5k gates |
| R8051XC2–BF | 433 MHz | 18.8k gates |
| R8051XC2 | 270 MHz | 70.7k gates |