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TVOUT_CTRL Video Display Controller Core

On this page: Description | Implementation Results | Features | Applications | Block Diagram | Functional Description | Example Application | Support | Verification | Deliverables

Implements a VGA display controller compatible with the ITU-R BT601/BT656 recommendation.

The TVOUT_CTRL accepts three different input formats and produces standard 4:2:2 YCrCb pixel data. It also generates all the required horizontal and vertical timing peri-ods: horizontal and vertical front porch, back porch and sync intervals. The core’s output signals are compatible with Analog Devices’ ADV7174/79 encoder video chip.

Ready for easy integration with AMBA-based microprocessor systems, the TVOUT_CTRL includes a wrapper that efficiently interfaces the core DMA, FIFO, and control logic functions with the AMBA High-Speed Bus (AHB).

The core is designed for efficient implementation, good performance, and straightforward testing in an ASIC or FPGA SoC design. Typical ASIC results (0.18 µm) show it to require from 14,300 gates for 100 MHz speed to 15,200 gates for 200 MHz.

See representative implementation results (each in a new pop-up window):

Features

• Produces video data that meets the ITU-R BT601/BT656 recommendation
• Accepts display data input in three formats:
• RBG 24 bit / pixel
• RBG 15 bit / pixel
• 4:2:2 YUV (YCrCb)
• Provides a video data analog converter (VDAC) interface compatible with an Analog Devices ADV7174/79 chip or similar for PAL/NTSC video generation
• Dedicated unidirectional DMA controller with burst transaction support
• Configurable internal FIFO
• Power Save Mode
• Internal, event stimulated, and interrupt request generation, with masking capability
• Integrated test mode – core generates color bar without any AHB bus transactions
• Integrated with AMBA bus:
• AMBA AHB slave unit to interface with the host controller
• AMBA AHB master unit to interface with the host memory
• Designed for efficient implementation and straightforward testing in ASICs or SoCs

Applications

The TVOUT_CTRL is ideal for use in conjunction with a video data processor such as the Analog Devices’ ADV7174 PAL/NTSC video encoder chip. Typical applications include:

• portable video systems
• digital cameras with video output
• advanced mobile phones with video capabilities

Block Diagram

Functional Description

The TVOUT_CTRL core interfaces VDAC to AMBA AHB bus based microprocessor system, see figure below. It is composed of several sub-blocks:

• VGA - counters and synchronization block
• AHB slave wrapper - bidirectional wrapper from CONTROL block to AMBA bus
• AHB master wrapper - unidirectional wrapper AMBA AHB bus to DMA block
• DMA - unidirectional DMA controller
• SFR_VGA - Special Function Registers block
• SFR_SYNC - software reset generation
• CONV FIFO - DMA interface/controller of RAM
• VGA FIFO - VGA interface/controller of RAM

The TVOUT_CTRL operates as a master device for data transfers, so the AHB wrapper implements master AHB signals and functions. It takes data from the AHB bus one in three different input formats for DMA block: RGB 24-bits/pixel, RGB 15-bits/pixel and 4:2:2 YCrCb 32-bits/2 pixels.

Then the DMA block converts pixel format to 4:2:2 YCrCb and stores it into the FIFO buffer.

The VGA block takes input data from the FIFO buffer in the DMA block and outputs this data with horizontal and vertical synchronization signals as well as video blanking signal.

Interfaces

There are three main interfaces in the TVOUT_CTRL core:

• The VDAC interface is designed especially to support the Analog Devices ADV7174/79 video encoder or similar chip.
• The AMBA AHB slave interface provides access to all features of the TVOUT_CTRL controller.
• The AMBA AHB master interface is used by the internal DMA controller for host memory to peripheral transactions.

Example Application

This example application transmits data from the host memory to the television set. The microcontroller controls the configuration of the core and processes interrupt requests using the AMBA™ AHB Slave bus. Data from the host memory is sent to the TVOUT-CTRL through the AMBA™ AHB Master interface. The TVOUT-CTRL Display Controller transfers the data to an ADV7174 video encoder in YCrCb format.

Support

The core as delivered is warranted against defects for ninety days from purchase. Thirty days of phone and email technical support are included, starting with the first interaction. Additional maintenance and support options are available.

Verification

The core has been verified through extensive simulation and rigorous code coverage measurements.

Deliverables

The core is available in ASIC (synthesizable HDL) and FPGA (netlist) forms, and includes everything required for successful implementation:

• HDL RTL source code (ASICs) or post-synthesis EDIF netlist (FPGAs)
• An example chip implementation, which uses the TVOUT_CTRL in a sample system
• Sophisticated HDL Testbench including external FIFOs, buffers, models of interfaces, and the core
• Simulation script, vectors, expected results, and comparison utility
• Synthesis script (ASICs) or place and route script (FPGAs)
• Comprehensive user documentation, including detailed specifications and a system integration guide

On this page: Description | Implementation Results | Features | Applications | Block Diagram | Functional Description | Example Application | Support | Verification | Deliverables

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This core developed by the peripheral controller experts at Evatronix SA