Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Protected Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs. See the video and image compression Family Page for a media compression overview.

 H.264 Video Decoders
Low Latency Constrained
  Baseline Profile

Low-Power Constrained
  Baseline Profile

 H.265 HEVC Decoders
Main Profile

Companion Cores
Image Processing
WDR/HDR
CAMFE Camera Processor
Network Stacks
40G UDPIP Stack
1G/10G UDPIP Stack
• Hardware RTP Stack
  – for H.264
  – for JPEG
IEEE 802.1AS Time Sync.
   Stack

IEEE 802.1Qav & 802.1Qbv
   Stack

• MPEG Transport Stream
  Mux

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

JPEG-LS
Lossless & Near-Lossless
Encoder
Decoder

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • for Intel FPGAs
    • for Xiinx FPGAs

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

Flash Controllers
Parallel Flash
Parallel Flash for AHB
Universal Serial NOR/NAND
   Flash for AHB

Legacy Peripherals
DMA Controllers
8237, 82380
UARTs
16450S, 16550S, 16750S
Timer/Counter
8254

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

SPI
Octal/Quad/Dual/Single SPI
XIP & DMA for AHB
XIP for AHB
Quad SPI
XIP & DMA for AHB
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
Master/Slave VIP
I2C
Master  • Slave

These encryption cores make it easy to build security into a variety of systems.

AES
AES, programmable
  CCM, GCM, XTS
Key Expander

DES
DES single
DES triple

Hash Functions
SHA-3 (Keccak)
SHA-256
SHA-1
MD5

CAST logo

CAST COREspondance

The IP newsletter from CAST, Inc. — December 3, 2012

IP Growth: Models to Platforms

When CAST began 19 years ago, our first products—-simulation models for standard parts—-were quickly followed by "synthesizable models" for the same parts.

We frankly hadn't planned this, but responded quickly to requests from advanced customers already making use of early synthesis tools from Synopsys and others. This set CAST on a business path that still works well today, supplying reusable intellectual property products, which came to be called IP cores.

Customer needs for IP have evolved along the way. Once over the "not invented here" hurdle, designers have fully embraced IP-based design. The smart approach today is to not reinvent the wheel, that is, to use IP for system elements that don't distinguish one's product in the market, and to focus creative design energies on the parts that do.

IP subsystem example: BA22 PIPIP subsystems are the natural next step in this evolution. Also called platforms, these combine multiple functional cores with glue logic and essential software in a larger IP block that's pre-verified and ready to add to an SoC. A subsystem may completely handle a key operation—such as a network connectivity block—or even encapsulate application expertise most designers don't have, such as a video compression and transmission block.

CAST offers several such platforms, and we also have IP integration services available to help designers rapidly and successfully incorporate them in systems.

We're just one of many IP vendors moving up to the subsystem level. You can hear from us and others in a panel discussion I'm moderating tomorrow at the D&R IP SoC event in Grenoble.

Platform & Subsystem IP: Trends and Realities

If you can't be there, send me your questions in advance, and also look for the results of the discussion to be published later.

-- Hal Barbour, President, +1 201.391.8300 ext. 111

High-Profile H.264 Video Encoder Core

We recently introduced a new H.264 video encoder that supports the standard's High Profile.

Sourced from long-time technology partner Alma Technologies, it builds on an existing suite of extreme-quality video cores with advanced performance and capabilities ideal for demanding applications like HD broadcast and professional camera.

The encoder’s advanced bit rate control rapidly adapts to content variations—providing excellent quality for even challenging video—and an intra-only version features extremely low latency for real-time applications. High throughput operation at lower clock frequencies enables Full-HD video compression in low-end FPGA devices, and over 1920x1080@60 input rates in ASICs.

Read more, or give us a call (+1 201.391.8300) or email to discuss how the new encoder might be the video solution you're looking for.

Real-World Processor Subsystem Energy Consumption

We've helped several customers work through the sometimes non-obvious issues of selecting processor IP that reduces a product's total power consumption as much as possible.

Just gathering published µW/MHz ratings is easy, but tells you little about the real-world energy consumption of a design. Analyzing the energy efficiency of alternative processors in the context of your specific requirements is much more challenging, but can pay off with significant energy savings for your system.

This requires understanding your application and gauging the interrelated, system-wide energy consumption effects of processor performance, code size, idle versus active periods, and chip area for your specific system. Dynamic power management techniques such as clock gating and frequency scaling are also essential.

We hope you can join us in discussing these issues in a free webinar, on Dec. 12th and again the 13th:

CPU Subsystem Total Power Consumption: Understanding
   the Factors and Selecting the Best IP

Meanwhile, learn more in our recent article for the GSA IP Working Group Blog:

Processor IP: Understanding “Low Power” in the Real World

And if you're looking for low-power, high-performance processor today, consider our BA22 family. With versions targeting deeply embedded systems through full application processors, it's one of the best IP choices you can make.

In this Issue:

Upcoming Events

Hal Barbour, CAST President
D&R IP-SoC 2012, Grenoble, France
Panel Discussion, Dec. 4, 4:00 pm:
Platform & Subsystem IP: Trends and Realities

Warren Savage
Learn about the many issues to consider when selecting processor IP for a low-power system in this free webinar: CPU Subsystem Total Power Consumption: Understanding the Factors and Selecting the Best IP
Dec. 12 and 13.
Please register in advance >.

DesignCon
DesignCon 2013 Jan. 29–30, 2013
Santa Clara, California
Booth 739

Customer Comments

iSine“iSine provides custom ASIC and SoC solutions to multiple market segments.

The quality and support of CAST IP cores have saved us valuable time to market with these products. In this highly competitive environment, this advantage is critical to the success of our company.

CAST has repeatedly and quickly helped us out of last-minute jams and multi-vendor IP interface issues.”
Robert Gross, Sr Engineer, iSine, Inc.

Recent Product Updates

Current Products

Download list of CAST IP Cores & Platforms

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Copyright © 2012, CAST, Inc. CAST is a trademark of CAST, Inc. All other trademarks are the property of their respective owners. CAST, Inc., 50 Tice Blvd., Suite 340, Woodcliff Lake, NJ 07677 +1.201.391.8300

 

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