Digital IP Cores
and Subsystems

Our family of microcontroller and microprocessor related cores includes capable and competitive 32-bit BA22s and the best-available set of proven 8051s.

32-bit Processors
BA2x Family Overview

Secure Processors
Geon - Secure Execution

Application Processors
BA25 Adv. App. Processor
BA22 Basic App. Processor

Cache-Enabled Embedded
BA22 Cache-Embedded

Embedded Processors
BA22 Deeply Embedded
BA21 Low Power
BA20 PipelineZero

Processor-Based AMBA® Subsystems
Family Overview
AHB Low-Power
AHB Performance/Low-Power
AXI Custom Performance

AMBA Bus Infrastructure Cores
See Peripherals Cores >

Efficiently compress media or data with these high-performance hardware codecs. See the video and image compression Family Page for a media compression overview.

 H.264 Video Decoders
Low Latency Constrained
  Baseline Profile

Low-Power Constrained
  Baseline Profile

 H.265 HEVC Decoders
Main Profile

Companion Cores
Image Processing
WDR/HDR
CAMFE Camera Processor
Network Stacks
40G UDPIP Stack
1G/10G UDPIP Stack
• Hardware RTP Stack
  – for H.264 Encoders
  – for H.264 Decoders
  – for JPEG Encoders
IEEE 802.1Qav & 802.1Qbv
   Stack

• MPEG Transport Stream
  Mux

JPEG Still & Motion
Encoders
Baseline
Extended
Ultra-Fast
Decoders
Baseline
Extended
Ultra-fast

JPEG-LS
Lossless & Near-Lossless
Encoder
Decoder

Lossless Data Compression
GZIP Compressor
GUNZIP Decompressor
GZIP Reference Designs
    • for Intel FPGAs
    • for Xiinx FPGAs

Easily integrate memories, peripherals, and hardware networking stacks into SoCs.

Display Controllers
TFT LCD

Device Controllers
smart card reader

Flash Controllers
Parallel Flash
Parallel Flash for AHB
Universal Serial NOR/NAND
   Flash for AHB

Quickly complete the standard parts of your SoC with these memory and peripheral controllers, interfaces, and interconnect cores.

Automotive Buses
CAN

CAN 2.0/FD controller
CAN FD Reference Design
CAN Bus VIP
Automotive Ethernet
TSN Endpoint Controller
CAN-to-TSN Gateway
LIN
LIN Bus Master/Slave
LIN Bus VIP
SENT/SAE J2716
Tx/Rx Controller

Avionics/DO-254 Buses
MIL-STD 1553
ARINC 429

SPI
Octal/Quad/Dual/Single SPI
XIP & DMA for AHB
XIP for AHB
Quad SPI
XIP & DMA for AHB
XIP for AHB
XIP for AXI
Master/Slave
Single SPI
Master/Slave
Bridges
SPI to AHB-Lite

I2C & SMBUS
Master/Slave Controller
I2C
Master  • Slave

These encryption cores make it easy to build security into a variety of systems.

GEON SoC Security
GEON Security
    Platform

Encryption Primitives
AES
AES, Programmable
  CCM, GCM, XTS
Key Expander
DES
Single, Triple

Hash Functions
SHA
SHA-3 (Keccak)
SHA-256
SHA-1
MD5
MD5

Other Posts & News

Recent Blog Posts

Recent News

See all the blog posts or news items

by CAST, Inc.

IP Events – the Newest and the Oldest

Article

We'd like to invite you to visit CAST at two great IP events in December.

CAST at REUSE 2016 and D&R SoC-IP 2016

REUSE 2016 on December 1st is a new event that grew from the desire of CAST and other sponsors to share higher-quality, IP-focused ideas and discussions with actual IP users.

Held at the Computer History Museum in Mountain View, California, it offers technical and business paper presentations, lunch, and a low-key exhibit area.

The solid program ranges from a keynote on IP Trends by Semico Research president Jim Feldman to a variety of technical and new product presentations. We’re presenting two papers:

  • Meredith Lucky, presenting on compression IP for IoT devicesUsing GZIP Data Compression to Reduce Power Consumption in IoT Devicesby Meredith Lucky — IP helped designers of first-generation IoT devices achieve their primary goal of getting to market quickly. Now second-generation IoT device designers must do more, differentiating their products from competitors by reducing power requirements, lowering costs, and providing more processing power in edge devices. Lossless compression IP implementing a widely accepted standard such as GZIP can help in all three of these areas. Here we will focus on one area, power reduction. 
     
  • Nikos Zervas, presenting on IP for low-latency video streamingChoosing the Right IP Cores for Low-Latency Video Streaming, by Dr. Nikos Zervas — A negligible delay from video capture to display—the “glass-to-glass” latency—is critical for many video streaming applications, from advanced driver assistant systems (ADAS) and unmanned vehicles to video conferencing and broadcasting. Choosing the IP cores that will enable a successful low-latency video system is not a trivial task: designers must first understand the factors that impact latency, then select cores that provide adequate control over the latency-critical functions.

REUSE 2016 is free; register here.

The second event is the 25th edition of the IP-SoC Conference and Exhibition, sponsored again by Design and Reuse. Taking place December 6th-7th in Grenoble, France, it promises to once again be a worthwhile experience as IP providers and IP users gather to discuss mutual concerns. We’ll have an exhibit table there, and are also presenting a new paper:

  • Bill Finch presenting on IP for the next IoT generationBack to the Future. The end of IoTby Bill Finch — The term Internet of Things is the most over used, over hyped, misused and misunderstood phrase of the last few years. It now has so many meanings that it has become useless to describe anything worthwhile. As designers of IP and electronic systems we need to refocus on what we want to accomplish going forward. As always, it's about customer needs and long term benefits.

To attend IP-SoC 2016, please register here.

We hope to see you at one—or both—of these IP-focused events. If you can’t make it, watch our blog afterwards for access to our papers. We’re also happy to discuss any aspect of CAST’s IP or IP in general at any time, via email (info@cast-inc.com) or phone (+1 201.391.8300).

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